PSMN1R6-30PL
N-channel 30 V 1.7 mΩ logic level MOSFET
Rev. 02 — 25 June 2009
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in TO220 package qualified to 175 °C. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
1.2 Features and benefits
High efficiency due to low switching
and conduction losses
Suitable for logic level gate drive
sources
1.3 Applications
DC-to-DC converters
Load switiching
Motor control
Server power supplies
1.4 Quick reference data
Table 1.
V
DS
I
D
P
tot
Quick reference
Conditions
T
mb
= 25 °C; V
GS
= 10 V;
see
Figure 1;
T
mb
= 25 °C; see
Figure 2
[1]
Min
-
-
-
Typ
-
-
-
Max
30
100
306
Unit
V
A
W
drain-source voltage T
j
≥
25 °C; T
j
≤
175 °C
drain current
total power
dissipation
gate-drain charge
Symbol Parameter
Dynamic characteristics
Q
GD
V
GS
= 4.5 V; I
D
= 25 A;
V
DS
= 15 V; see
Figure 14;
see
Figure 15
V
GS
= 4.5 V; I
D
= 25 A;
V
DS
= 15 V; see
Figure 14
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C;
[2]
-
27
-
nC
Q
G(tot)
total gate charge
-
101
-
nC
Static characteristics
R
DSon
drain-source
on-state resistance
-
1.4
1.7
mΩ
[1]
[2]
Continuous current is limited by package.
Measured 3 mm from package.
NXP Semiconductors
PSMN1R6-30PL
N-channel 30 V 1.7 mΩ logic level MOSFET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol
G
D
S
D
Description
gate
drain
source
mounting base; connected to
drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
1 2 3
SOT78
(TO-220AB; SC-46)
3. Ordering information
Table 3.
Ordering information
Package
Name
PSMN1R6-30PL
TO-220AB;
SC-46
Description
Version
plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78
TO-220AB
Type number
PSMN1R6-30PL_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 25 June 2009
2 of 13
NXP Semiconductors
PSMN1R6-30PL
N-channel 30 V 1.7 mΩ logic level MOSFET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
T
mb
= 25 °C;
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
[1]
V
GS
= 10 V; T
mb
= 100 °C; see
Figure 1;
V
GS
= 10 V; T
mb
= 25 °C; see
Figure 1;
t
p
≤
10 µs; pulsed; T
mb
= 25 °C; see
Figure 3
T
mb
= 25 °C; see
Figure 2
[1]
[1]
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
T
j
≥
25 °C; T
j
≤
175 °C; R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-55
-55
-
-
-
Max
30
30
20
100
100
1268
306
175
175
100
1268
1.7
Unit
V
V
V
A
A
A
W
°C
°C
A
A
J
In accordance with the Absolute Maximum Rating System (IEC 60134).
Source-drain diode
Avalanche ruggedness
non-repetitive
V
GS
= 10 V; T
j(init)
= 25 °C; I
D
= 100 A; V
sup
≤
30 V;
drain-source avalanche R
GS
= 50
Ω;
unclamped
energy
[1]
Continuous current is limited by package.
400
I
D
(A)
300
003aad003
120
P
der
(%)
80
03aa16
200
40
100
(1)
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
PSMN1R6-30PL_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 25 June 2009
3 of 13
NXP Semiconductors
PSMN1R6-30PL
N-channel 30 V 1.7 mΩ logic level MOSFET
10
4
I
D
(A)
10
3
003aad115
Limit R
DSon
= V
DS
/ I
D
10
μs
100
μs
10
2
(1)
10
DC
1 ms
10 ms
100 ms
1
10
-1
1
10
V
DS
(V)
10
2
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
Conditions
Min
-
Typ
0.22
Max
0.49
Unit
K/W
thermal resistance from see
Figure 4
junction to mounting
base
1
Z
th(j-mb)
(K/W)
10
-1
0.2
0.1
0.05
10
-2
0.02
P
003aad005
δ
= 0.5
δ
=
t
p
T
10
-3
single shot
10
-4
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
T
t
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration; typical
values
PSMN1R6-30PL_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 25 June 2009
4 of 13
NXP Semiconductors
PSMN1R6-30PL
N-channel 30 V 1.7 mΩ logic level MOSFET
6. Characteristics
Table 6.
Symbol
V
(BR)DSS
V
GS(th)
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C; see
Figure 11;
see
Figure 12
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C; see
Figure 12
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C; see
Figure 12
I
DSS
I
GSS
R
DSon
drain leakage current
gate leakage current
drain-source on-state
resistance
V
DS
= 30 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 30 V; V
GS
= 0 V; T
j
= 125 °C
V
GS
= 16 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -16 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= 4.5 V; I
D
= 25 A; T
j
= 25 °C
V
GS
= 10 V; I
D
= 25 A; T
j
= 100 °C; see
Figure 13
V
GS
= 10 V; I
D
= 25 A; T
j
= 25 °C;
R
G
Q
G(tot)
gate resistance
total gate charge
f = 1 MHz
I
D
= 25 A; V
DS
= 15 V; V
GS
= 10 V; see
Figure 14;
see
Figure 15
I
D
= 0 A; V
DS
= 0 V; V
GS
= 10 V
I
D
= 25 A; V
DS
= 15 V; V
GS
= 4.5 V; see
Figure 14
Q
GS
Q
GS(th)
Q
GS(th-pl)
Q
GD
V
GS(pl)
C
iss
C
oss
C
rss
gate-source charge
pre-threshold
gate-source charge
post-threshold
gate-source charge
gate-drain charge
gate-source plateau
voltage
input capacitance
output capacitance
reverse transfer
capacitance
I
D
= 25 A; V
DS
= 15 V; V
GS
= 4.5 V; see
Figure 14;
see
Figure 15
V
DS
= 15 V; see
Figure 14
V
DS
= 12 V; V
GS
= 0 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 16
I
D
= 25 A; V
DS
= 15 V; V
GS
= 4.5 V; see
Figure 14;
see
Figure 15
I
D
= 25 A; V
DS
= 15 V; V
GS
= 4.5 V; see
Figure 14
Dynamic characteristics
-
-
-
-
-
-
-
-
-
-
-
212
193
101
33
20
13
27
2.5
12493
2486
1034
-
-
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
nC
nC
V
pF
pF
pF
[1]
Min
30
27
1.3
0.5
-
-
-
-
-
-
-
-
-
Typ
-
-
1.7
-
-
-
-
-
-
1.6
-
1.4
0.98
Max
-
-
2.15
-
2.45
5
150
100
100
2.1
2.3
1.7
-
Unit
V
V
V
V
V
µA
µA
nA
nA
mΩ
mΩ
mΩ
Ω
Tested to JEDEC standards where applicable.
Static characteristics
PSMN1R6-30PL_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 25 June 2009
5 of 13
京公网安备 11010802033920号
EEWORLD
