DF
N2
020
-6
PMC85XP
15 May 2013
30 V P-channel MOSFET with pre-biased NPN transistor
Product data sheet
1. General description
P-channel enhancement mode Field-Effect Transistor (FET) in Trench MOSFET
technology and NPN Resistor-Equipped Transistor (RET) together in a leadless medium
power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.
2. Features and benefits
•
•
•
•
Trench MOSFET technology
NPN transistor built-in bias resistors
Small and leadless ultra thin SMD plastic package: 2 x 2 x 0.65 mm
Exposed drain pad for excellent thermal conduction
3. Applications
•
•
•
•
•
Charging switch for portable devices
High-side load switch
USB port overvoltage protection
Power management in battery-driven portables
Hard disk and computing power management
4. Quick reference data
Table 1.
Symbol
V
DS
V
GS
I
D
R
DSon
NPN RET
V
CEO
I
O
collector-emitter
voltage
output current
T
amb
= 25 °C; open base
-
-
-
-
50
100
V
mA
Quick reference data
Parameter
drain-source voltage
gate-source voltage
drain current
V
GS
= -4.5 V; T
amb
= 25 °C; t ≤ 5 s
V
GS
= -4.5 V; I
D
= -2.6 A; T
j
= 25 °C
[1]
Conditions
T
j
= 25 °C
Min
-
-12
-
Typ
-
-
-
Max
-30
12
-3.4
Unit
V
V
A
P-channel Trench MOSFET
P-channel Trench MOSFET; static characteristics
drain-source on-state
resistance
-
85
110
mΩ
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NXP Semiconductors
PMC85XP
30 V P-channel MOSFET with pre-biased NPN transistor
Symbol
NPN RET
R1
R2
Parameter
bias resistor 1
bias resistor 2
[1]
Conditions
Min
3.3
-
Typ
4.7
47
Max
6.1
-
Unit
kΩ
kΩ
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and mounting pad
for drain 6 cm
2
5. Pinning information
Table 2.
Pin
1
2
3
4
5
6
7
8
Pinning information
Symbol Description
E
B
D
S
G
C
C
D
emitter
base
drain
source
gate
collector
collector
drain
1
2
3
E
B
D
017aaa396
Simplified outline
6
5
4
Graphic symbol
C
G
S
7
8
R2
R1
Transparent top view
DFN2020-6 (SOT1118)
6. Ordering information
Table 3.
Ordering information
Package
Name
PMC85XP
DFN2020-6
Description
plastic thermal enhanced ultra thin small outline package; no
leads; 6 terminals; body 2 x 2 x 0.65 mm
Version
SOT1118
Type number
7. Marking
Table 4.
PMC85XP
Marking codes
Marking code
1K
Type number
PMC85XP
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© NXP B.V. 2013. All rights reserved
Product data sheet
15 May 2013
2 / 15
NXP Semiconductors
PMC85XP
30 V P-channel MOSFET with pre-biased NPN transistor
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
I
D
Parameter
drain-source voltage
gate-source voltage
drain current
V
GS
= -4.5 V; T
amb
= 25 °C; t ≤ 5 s
V
GS
= -4.5 V; T
amb
= 25 °C
V
GS
= -4.5 V; T
amb
= 100 °C
I
DM
P
tot
peak drain current
total power dissipation
T
amb
= 25 °C; single pulse; t
p
≤ 10 µs
T
amb
= 25 °C
T
sp
= 25 °C
P-channel Trench MOSFET; source-drain diode
I
S
NPN RET
V
CBO
V
CEO
V
EBO
V
I
I
O
I
CM
P
tot
collector-base voltage
collector-emitter voltage
emitter-base voltage
input voltage
output current
peak collector current
total power dissipation
T
amb
= 25 °C
T
sp
= 25 °C
Per device
T
j
T
amb
T
stg
junction temperature
ambient temperature
storage temperature
[1]
[2]
[2]
[1]
[2]
[2]
[1]
[2]
[1]
[1]
[1]
Conditions
T
j
= 25 °C
Min
-
-12
-
-
-
-
-
-
-
Max
-30
12
-3.4
-2.6
-1.6
-8
485
1170
8300
Unit
V
V
A
A
A
A
mW
mW
mW
P-channel Trench MOSFET
source current
T
amb
= 25 °C
T
amb
= 25 °C; open emitter
T
amb
= 25 °C; open base
T
amb
= 25 °C; open collector
positive
negative
[1]
-
-1.2
A
-
-
-
-
-
-
-
-
-
-
50
50
10
30
-5
100
100
465
985
4160
V
V
V
V
V
mA
mA
mW
mW
mW
-55
-55
-65
150
150
150
°C
°C
°C
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and mounting pad
for drain 6 cm
Device mounted on an FR4 PCB, single-sided copper; tin-plated and standard footprint.
2
PMC85XP
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© NXP B.V. 2013. All rights reserved
Product data sheet
15 May 2013
3 / 15
NXP Semiconductors
PMC85XP
30 V P-channel MOSFET with pre-biased NPN transistor
120
P
der
(%)
80
017aaa123
120
I
der
(%)
80
017aaa124
40
40
0
- 75
- 25
25
75
125
T
j
(°C)
175
0
- 75
- 25
25
75
125
T
j
(°C)
175
Fig. 1.
Normalized total power dissipation as a
function of junction temperature
Fig. 2.
Normalized continuous drain current as a
function of junction temperature
-10
I
D
(A)
-1
aaa-003661
Limit R
DSon
= V
DS
/I
D
t
p
= 100 µs
t
p
= 1 ms
t
p
= 10 ms
-10
-1
DC; T
sp
= 25 °C
DC; T
amb
= 25 °C;
drain mounting pad 6 cm
2
t
p
= 100 ms
-10
-2
-10
-1
-1
-10
V
DS
(V)
-10
2
I
DM
= single pulse
Fig. 3.
Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-
source voltage
9. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance
from junction to
ambient
Conditions
in free air
t ≤ 5 s; in free air
All information provided in this document is subject to legal disclaimers.
Min
[1]
[2]
[2]
Typ
223
93
55
Max
256
107
63
Unit
K/W
K/W
K/W
4 / 15
P-channel Trench MOSFET
-
-
-
PMC85XP
© NXP B.V. 2013. All rights reserved
Product data sheet
15 May 2013
NXP Semiconductors
PMC85XP
30 V P-channel MOSFET with pre-biased NPN transistor
Symbol
R
th(j-sp)
Parameter
thermal resistance
from junction to solder
point
thermal resistance
from junction to
ambient
thermal resistance
from junction to solder
point
[1]
[2]
Conditions
Min
-
Typ
10
Max
15
Unit
K/W
NPN RET
R
th(j-a)
in free air
[1]
[2]
-
-
-
233
110
25
270
127
30
K/W
K/W
K/W
R
th(j-sp)
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper; tin-plated and standard
footprint.
Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and mounting pad
for drain 6 cm
2
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.2
0.05
0.02
0.01
1
0
0.5
0.25
0.1
10
017aaa398
10
-1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, standard footprint
Fig. 4.
P-channel Trench MOSFET: Transient thermal impedance from junction to ambient as a function of pulse
duration; typical values
PMC85XP
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved
Product data sheet
15 May 2013
5 / 15