K7R160884B-FC30 datasheet, PDF

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K7R160884B-FC30: DescriptionQDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165; Categorystorage storage; File Size204KB，19 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/

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K7R160884B-FC30 Overview

QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165

K7R160884B-FC30 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	SAMSUNG
Objectid	1958634574
Parts packaging code	BGA
package instruction	LBGA, BGA165,11X15,40
Contacts	165
Reach Compliance Code	unknown
ECCN code	3A991.B.2.A
compound_id	9601336
Maximum access time	0.45 ns
Other features	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	303 MHz
I/O type	SEPARATE
JESD-30 code	R-PBGA-B165
JESD-609 code	e0
length	17 mm
memory density	16777216 bit
Memory IC Type	QDR SRAM
memory width	8
Number of functions	1
Number of terminals	165
word count	2097152 words
character code	2000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2MX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LBGA
Encapsulate equivalent code	BGA165,11X15,40
Package shape	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	1.5/1.8,1.8 V
Certification status	Not Qualified
Maximum seat height	1.4 mm
Maximum standby current	0.2 A
Minimum standby current	1.7 V
Maximum slew rate	0.43 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
width	15 mm

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K7R163684B

K7R161884B

K7R160884B

Document Title

Preliminary

512Kx36 & 1Mx18 & 2Mx8 QDR

II b4 SRAM

512Kx36-bit,1Mx18-bit, 2Mx8-bit QDR

II b4 SRAM

Revision History

Rev. No.

0.0

0.1

History

1. Initial document.

1. Change the Boundary scan exit order.

2. Correct the Overshoot and Undershoot timing diagram.

1. Change JTAG Block diagram

Draft Date

Oct. 17. 2002

Dec. 16, 2002

Remark

Advance

Preliminary

0.2

Dec. 26, 2002

Preliminary

The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the

specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-

tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.

-1-

Dec. 2002

Rev 0.2

K7R160884B-FC30 Related Products

	K7R160884B-FC30	K7R160884B-FC16	K7R160884B-FC33	K7R163684B-FC33	K7R161884B-FC33	K7R160884B-FC20
Description	QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165	QDR SRAM, 2MX8, 0.5ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165	QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165	QDR SRAM, 512KX36, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165	QDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165	QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Maker	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG	SAMSUNG
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA
package instruction	LBGA, BGA165,11X15,40	LBGA, BGA165,11X15,40	LBGA, BGA165,11X15,40	LBGA, BGA165,11X15,40	LBGA, BGA165,11X15,40	LBGA, BGA165,11X15,40
Contacts	165	165	165	165	165	165
Reach Compliance Code	unknown	unknown	unknown	compliant	compliant	unknown
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	0.45 ns	0.5 ns	0.45 ns	0.45 ns	0.45 ns	0.45 ns
Other features	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	303 MHz	167 MHz	333 MHz	333 MHz	333 MHz	200 MHz
I/O type	SEPARATE	SEPARATE	SEPARATE	SEPARATE	SEPARATE	SEPARATE
JESD-30 code	R-PBGA-B165	R-PBGA-B165	R-PBGA-B165	R-PBGA-B165	R-PBGA-B165	R-PBGA-B165
JESD-609 code	e0	e0	e0	e0	e0	e0
length	17 mm	17 mm	17 mm	17 mm	17 mm	17 mm
memory density	16777216 bit	16777216 bit	16777216 bit	18874368 bit	18874368 bit	16777216 bit
Memory IC Type	QDR SRAM	QDR SRAM	QDR SRAM	QDR SRAM	QDR SRAM	QDR SRAM
memory width	8	8	8	36	18	8
Number of functions	1	1	1	1	1	1
Number of terminals	165	165	165	165	165	165
word count	2097152 words	2097152 words	2097152 words	524288 words	1048576 words	2097152 words
character code	2000000	2000000	2000000	512000	1000000	2000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	2MX8	2MX8	2MX8	512KX36	1MX18	2MX8
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LBGA	LBGA	LBGA	LBGA	LBGA	LBGA
Encapsulate equivalent code	BGA165,11X15,40	BGA165,11X15,40	BGA165,11X15,40	BGA165,11X15,40	BGA165,11X15,40	BGA165,11X15,40
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE	GRID ARRAY, LOW PROFILE
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	1.5/1.8,1.8 V	1.5/1.8,1.8 V	1.5/1.8,1.8 V	1.5/1.8,1.8 V	1.5/1.8,1.8 V	1.5/1.8,1.8 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.4 mm	1.4 mm	1.4 mm	1.4 mm	1.4 mm	1.4 mm
Minimum standby current	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	15 mm	15 mm	15 mm	15 mm	15 mm	15 mm

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