DF
N1
01
PBSS5260QA
28 August 2013
0D
-3
60 V, 1.7 A PNP low VCEsat (BISS) transistor
Product data sheet
1. General description
PNP low V
CEsat
Breakthrough In Small Signal (BISS) transistor in a leadless ultra small
DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible
and solderable side pads.
NPN complement: PBSS4260QA.
2. Features and benefits
•
•
•
•
•
•
•
Very low collector-emitter saturation voltage V
CEsat
High collector current capability I
C
and I
CM
High collector current gain h
FE
at high I
C
High energy efficiency due to less heat generation
Reduced Printed-Circuit Board (PCB) area requirements
Solderable side pads
AEC-Q101 qualified
3. Applications
•
•
•
•
•
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1.
Symbol
V
CEO
I
C
I
CM
R
CEsat
Quick reference data
Parameter
collector-emitter
voltage
collector current
peak collector current
collector-emitter
saturation resistance
t
p
≤ 1 ms; pulsed
I
C
= -1 A; I
B
= -100 mA; pulsed;
t
p
≤ 300 µs; δ ≤ 0.02 ; T
amb
= 25 °C
Conditions
open base
Min
-
-
-
-
Typ
-
-
-
195
Max
-60
-1.7
-2.5
280
Unit
V
A
A
mΩ
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NXP Semiconductors
PBSS5260QA
60 V, 1.7 A PNP low VCEsat (BISS) transistor
5. Pinning information
Table 2.
Pin
1
2
3
4
Pinning information
Symbol Description
B
E
C
C
base
emitter
collector
collector
2
Transparent top view
Simplified outline
1
Graphic symbol
C
B
4
3
sym132
E
DFN1010D-3 (SOT1215)
6. Ordering information
Table 3.
Ordering information
Package
Name
PBSS5260QA
DFN1010D-3
Description
plastic thermal enhanced ultra thin small outline package; no
leads; 3 terminals
Version
SOT1215
Type number
7. Marking
Table 4.
Marking codes
Marking code
10 00 10
READING
DIRECTION
Type number
PBSS5260QA
MARKING CODE
(EXAMPLE)
YEAR DATE
CODE
VENDOR CODE
PIN 1
INDICATION MARK
MARK-FREE AREA
READING EXAMPLE:
11
01
10
aaa-008041
Fig. 1.
PBSS5260QA
DFN1010D-3 (SOT1215) binary marking code description
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2013. All rights reserved
Product data sheet
28 August 2013
2 / 17
NXP Semiconductors
PBSS5260QA
60 V, 1.7 A PNP low VCEsat (BISS) transistor
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
CBO
V
CEO
V
EBO
I
C
I
CM
I
B
I
BM
P
tot
Parameter
collector-base voltage
collector-emitter voltage
emitter-base voltage
collector current
peak collector current
base current
peak base current
total power dissipation
t
p
≤ 1 ms; pulsed
T
amb
≤ 25 °C
[1]
[2]
[3]
[4]
[5]
Conditions
open emitter
open base
open collector
Min
-
-
-
-
Max
-60
-60
-7
-1.7
-2.5
-0.3
-1
325
600
740
540
1000
150
150
150
Unit
V
V
V
A
A
A
A
mW
mW
mW
mW
mW
°C
°C
°C
t
p
≤ 1 ms; pulsed
-
-
-
-
-
-
-
-
-
-55
-65
T
j
T
amb
T
stg
junction temperature
ambient temperature
storage temperature
[1]
[2]
[3]
[4]
[5]
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided copper, tin-plated mounting pad for collector 6 cm .
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, 4-layer copper, tin-plated mounting pad for collector 1 cm .
2
2
2
PBSS5260QA
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© NXP N.V. 2013. All rights reserved
Product data sheet
28 August 2013
3 / 17
NXP Semiconductors
PBSS5260QA
60 V, 1.7 A PNP low VCEsat (BISS) transistor
1.25
P
tot
(W)
1.00
(1)
aaa-007844
0.75
(2)
(3)
0.50
(4)
(5)
0.25
0
-75
-25
2
2
2
25
75
125
175
T
amb
(°C)
(1) FR4 PCB, 4-layer copper, 1 cm
(2) FR4 PCB, single-sided copper, 6 cm
(3) FR4 PCB, single-sided copper, 1 cm
(4) FR4 PCB, 4-layer copper, standard footprint
(5) FR4 PCB, single-sided copper, standard footprint
Fig. 2.
Power derating curves
9. Thermal characteristics
Table 6.
Symbol
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance
from junction to
ambient
Conditions
in free air
[1]
[2]
[3]
[4]
[5]
[1]
[2]
[3]
[4]
[5]
Min
-
-
-
-
-
Typ
-
-
-
-
-
Max
385
209
169
232
125
2
2
Unit
K/W
K/W
K/W
K/W
K/W
Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, single-sided copper, tin-plated mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided copper, tin-plated mounting pad for collector 6 cm .
Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.
Device mounted on an FR4 PCB, 4-layer copper, tin-plated mounting pad for collector 1 cm .
2
PBSS5260QA
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2013. All rights reserved
Product data sheet
28 August 2013
4 / 17
NXP Semiconductors
PBSS5260QA
60 V, 1.7 A PNP low VCEsat (BISS) transistor
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.2
0.1
0.05
10
0.02
0.01
0.5
aaa-007845
0
1
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, single-sided copper, standard footprint
Fig. 3.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
10
3
Z
th(j-a)
(K/W)
10
2
duty cycle = 1
0.75
0.33
0.1
10
0.02
0.05
0.01
0.5
0.2
aaa-007846
1
0
10
-1
10
-5
10
-4
10
-3
2
10
-2
10
-1
1
10
10
2
t
p
(s)
10
3
FR4 PCB, single-sided copper, 1 cm
Fig. 4.
Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5260QA
All information provided in this document is subject to legal disclaimers.
© NXP N.V. 2013. All rights reserved
Product data sheet
28 August 2013
5 / 17
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