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JANSH2N7261U

Description
Power Field-Effect Transistor, 8A I(D), 100V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, LCC-18
CategoryDiscrete semiconductor    The transistor   
File Size304KB,27 Pages
ManufacturerInfineon
Websitehttp://www.infineon.com/
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JANSH2N7261U Overview

Power Field-Effect Transistor, 8A I(D), 100V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, LCC-18

JANSH2N7261U Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionCHIP CARRIER, R-CQCC-N15
Reach Compliance Codecompli
ECCN codeEAR99
Other featuresHIGH RELIABILITY
Avalanche Energy Efficiency Rating (Eas)130 mJ
Shell connectionSOURCE
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage100 V
Maximum drain current (Abs) (ID)8 A
Maximum drain current (ID)8 A
Maximum drain-source on-resistance0.24 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-CQCC-N15
JESD-609 codee0
Number of components1
Number of terminals15
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
Package shapeRECTANGULAR
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum power dissipation(Abs)25 W
Maximum pulsed drain current (IDM)32 A
Certification statusQualified
GuidelineMIL-19500/601
surface mountYES
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
Base Number Matches1
The documentation and process conversion
measures necessary to comply with this revision
shall be completed by 17 July 2013.
INCH-POUND
MIL-PRF-19500/601K
17 April 2013
SUPERSEDING
MIL-PRF-19500/601J
14 March 2012
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT POWER
TRANSISTORS, N-CHANNEL, SILICON, TYPES 2N7261 AND 2N7262 U AND U5 SUFFIXES, JANTXV,
AND RADIATION HARDENED TYPE SUFFIXES, JANTXVR, F, G, AND H AND JANSR, F, G, AND H
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and
MIL-PRF-19500.
1. SCOPE
* 1.1 Scope. This specification covers the performance requirements for an N-channel, enhancement-mode,
MOSFET, radiation hardened and non-hardened, power transistors. Two levels of product assurance are provided
for each device type as specified in
MIL-PRF-19500,
with avalanche energy maximum rating (E
AS
) and maximum
avalanche current (I
AS
). See
6.5
for JANHC and JANKC die versions.
1.2 Physical dimensions. See
figure 1
(TO-205AF) and
figure 2
(LCC).
1.3 Maximum ratings. Unless otherwise specified, T
A
= +25°C.
Type
(1)
R
θJC
(3)
R
θJA
T
J
and
T
STG
*
P
T
(2)
P
T
T
C
= +25°C T
A
= +25°C
(free air)
W
W
0.71
0.71
V
DS
and
V
DG
V
GS
I
D1
I
D2
(4) (5)
(4) (5)
T
C
= +25°C T
C
= +100°C
I
S
I
DM
(6)
°C/W
5.0
5.0
°C/W
175
175
V dc
100
200
V dc
±20
±20
A dc
8.0
5.5
A dc
5.0
3.5
A dc
8.0
5.5
A(pk)
32
22
°C
-55 to +150
-55 to +150
2N7261
2N7262
25
25
(1) Unless otherwise specified, electrical characteristics, ratings, and conditions for “U” and “U5” suffix devices
(surface mount LCC) are identical to the corresponding non “U” and “U5” suffix devices.
(2) Derate linearly 0.2 W/°C for T
C
> +25°C.
(3) See
figure 3,
thermal impedance curves.
(4) The following formula derives the maximum theoretical I
D
limit. I
D
is limited by package and internal wires
and may be limited by pin diameter:
T
JM
- T
C
I
D
=
(
R
θ
JC
)
x
(
R
DS
( on ) at T
JM
)
(5) See
figure 4,
maximum drain current graph.
(6) I
DM
= 4 X I
D1
as calculated in note (4).
* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,
ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dla.mil.
Since contact
information can change, you may want to verify the currency of this address information using the ASSIST
Online database at
https://assist.dla.mil/.
AMSC N/A
FSC 5961

JANSH2N7261U Related Products

JANSH2N7261U
Description Power Field-Effect Transistor, 8A I(D), 100V, 0.24ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, LCC-18
Is it Rohs certified? incompatible
package instruction CHIP CARRIER, R-CQCC-N15
Reach Compliance Code compli
ECCN code EAR99
Other features HIGH RELIABILITY
Avalanche Energy Efficiency Rating (Eas) 130 mJ
Shell connection SOURCE
Configuration SINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage 100 V
Maximum drain current (Abs) (ID) 8 A
Maximum drain current (ID) 8 A
Maximum drain-source on-resistance 0.24 Ω
FET technology METAL-OXIDE SEMICONDUCTOR
JESD-30 code R-CQCC-N15
JESD-609 code e0
Number of components 1
Number of terminals 15
Operating mode ENHANCEMENT MODE
Maximum operating temperature 150 °C
Package body material CERAMIC, METAL-SEALED COFIRED
Package shape RECTANGULAR
Package form CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED
Polarity/channel type N-CHANNEL
Maximum power dissipation(Abs) 25 W
Maximum pulsed drain current (IDM) 32 A
Certification status Qualified
Guideline MIL-19500/601
surface mount YES
Terminal surface Tin/Lead (Sn/Pb)
Terminal form NO LEAD
Terminal location QUAD
Maximum time at peak reflow temperature NOT SPECIFIED
transistor applications SWITCHING
Transistor component materials SILICON
Base Number Matches 1

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