Active LOW. If PD# = 0, the device is powered down and the clock
is disabled. The functionality of this pin is programmable.
Do not use:
DNU pins are electrically connected, but perform no function
Supply voltage:
2.5 V or 3.3 V
Ground
4, 5
2
6
3
CLK, CLK#
DNU
V
DD
V
SS
LVPECL output
Differential output clock
–
Power
Power
Document Number: 001-10179 Rev. *I
Page 3 of 14
CY2X014
Programming Description
The CY2X014 is a programmable device. Prior to being used in
an application, it must be programmed with the output frequency
and other variables described in
Programming Variables.
Two
different device types are available, each with its own
programming flow. They are described in the following sections.
Programming Variables
Output Frequency
The CY2X014 can synthesize a frequency to a resolution of one
part per million (ppm), but the actual accuracy of the output
frequency is limited by the accuracy of the integrated reference
crystal.
The CY2X014 has an output frequency range of 50 MHz to
690 MHz, but the range is not continuous. The CY2X014 cannot
generate frequencies in the ranges of 521 MHz to 529 MHz and
596 MHz to 617 MHz.
Field-programmable CY2X014
Field programmable devices are shipped unprogrammed and
must be programmed before being installed on a printed circuit
board (PCB). Customers use
CyClockWizard™
software to
specify the device configuration and generate a JEDEC
(extension .jed) programming file. Programming of samples and
prototype quantities is available using the CyClockWizard
software along with a
CY3675-CLKMAKER1 CyClockMaker
Clock Programmer Kit
with a
CY3675-LCC6A socket adapter.
Cypress’s value-added distribution partners also provide
programming services. Field-programmable devices are
designated with an ‘F’ in the part number. They are intended for
quick prototyping and inventory reduction.
The software and programmer kit hardware can be downloaded
from
www.cypress.com
by clicking the hyperlinks in the previous
paragraph.
Pin 1: Output Enable (OE) or Power Down (PD#)
Pin 1 is programmed as either OE or PD#. The OE function is
used to enable or disable the CLK output quickly, but it does not
reduce core power consumption. The PD# function puts the
device into a low power state, but the wake-up takes longer
because the PLL must reacquire the lock.
Industrial versus Commercial Device Performance
Industrial and commercial devices have different internal
crystals. They have a potentially significant impact on
performance levels for applications requiring the lowest-possible
phase noise. CyClockWIzard software allows the user to select
between and view the expected performance of both options.
Table 1. Device Programming Variables
Variable
Output frequency
Pin 1 function (OE or PD#)
Temperature range (commercial or industrial)
Factory-configured CY2X014
For ready-to-use devices, the CY2X014 is available with no field
programming required. A request for a custom configuration can
be made. All requests are submitted to the local Cypress Field
Application Engineer (FAE) or sales representative. After the
request is processed, the user receives a new part number,
samples, and datasheet with the programmed values. This part
number is used for additional sample requests and production
orders. The CY2X014 is one-time programmable (OTP).
Document Number: 001-10179 Rev. *I
Page 4 of 14
CY2X014
Absolute Maximum Conditions
Parameter
V
DD
V
IN[1]
T
S
T
J
ESD
HBM
JA[2]
Description
Supply voltage
Input voltage, DC
Temperature, storage
Temperature, junction
Electrostatic discharge (ESD)
protection human body model
(HBM)
Thermal resistance, junction to
ambient
JEDEC STD 22-A114-B
Relative to V
SS
Non operating
Condition
Min
–0.5
–0.5
–55
–40
2000
Max
4.4
V
DD
+ 0.5
135
135
–
Unit
V
V
°C
°C
V
0 m/s airflow
64
°C/W
Operating Conditions
Parameter
V
DD
T
PU
T
A
3.3-V supply voltage range
2.5-V supply voltage range
Power-up time for V
DD
to reach minimum specified voltage (power
ramp is monotonic)
Ambient temperature (commercial)
Ambient temperature (industrial)
Description
Min
3.0
2.375
0.05
0
–40
Typ
3.3
2.5
–
–
–
Max
3.6
2.625
500
70
85
Unit
V
V
ms
°C
°C
Notes
1. The voltage on any input or I/O pin cannot exceed the power pin during power up.
2. Simulated. The board is derived from the JEDEC multilayer standard. It measures 76 x 114 x 1.6 mm and has 4-layers of copper (2/1/1/2 oz.). The internal layers
are 100% copper planes, while the top and bottom layers have 50% metalization. No vias are included in the model.
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