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24AA512E/CS17K

Description
512K I2C Serial EEPROM
File Size664KB,36 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
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24AA512E/CS17K Overview

512K I2C Serial EEPROM

24AA512/24LC512/24FC512
512K I
2
C
Serial EEPROM
Device Selection Table
Part
Number
24AA512
24LC512
24FC512
Note 1:
2:
V
CC
Range
1.7-5.5V
2.5-5.5V
1.7-5.5V
Max. Clock
Frequency
400 kHz
(1)
400 kHz
1 MHz
(2)
Temp.
Ranges
I
I, E
I
Description:
The Microchip Technology Inc. 24AA512/24LC512/
24FC512 (24XX512*) is a 64K x 8 (512 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.7V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications and data acquisi-
tion. This device also has a page write capability of up
to 128 bytes of data. This device is capable of both
random and sequential reads up to the 512K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 4 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIJ, SOIC, TSSOP, DFN, and 14-lead TSSOP
packages. The 24AA512 is also available in the 8-lead
Chip Scale package.
100 kHz for V
CC
< 2.5V
400 kHz for V
CC
< 2.5V
Features:
• Single Supply with Operation down to 1.7V for
24AA512 and 24FC512 Devices, 2.5V for
24LC512 Devices
• Low-Power CMOS Technology:
- Active current 400 uA, typical
- Standby current 100 nA, typical
• 2-Wire Serial Interface, I
2
C
Compatible
• Cascadable for up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 5 ms max.
• Self-Timed Erase/Write Cycle
• 128-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4000V
• More than 1 Million Erase/Write Cycles
• Data Retention > 200 years
• Packages Include 8-lead PDIP, SOIJ, SOIC,
TSSOP, DFN, Chip Scale and 14-lead TSSOP
• Pb-Free and RoHS Compliant
• Temperature Ranges:
- Industrial (I): -40C to +85C
- Automotive (E):-40C to +125C
Block Diagram
A0 A1 A2 WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page Latches
I/O
SCL
YDEC
SDA
V
CC
V
SS
Sense Amp.
R/W Control
Package Type
PDIP/SOIJ/SOIC/TSSOP
A0
A1
A2
V
SS
1
24XX512
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0
A1
NC
NC
NC
A2
V
SS
1
2
3
4
5
6
7
TSSOP
14
13
12
11
10
9
8
V
CC
WP
NC
NC
NC
SCL
SDA
A0
A1
A2
V
SS
1
2
3
4
24XX512
DFN
8 V
CC
7 WP
6 SCL
5 SDA
WP
6
CS (Chip Scale)
(1)
V
CC
A1 A0
1
4
7
2
5
8
3
A2
24XX512
SDA SCL V
SS
(TOP DOWN VIEW,
BALLS NOT VISIBLE)
Note 1:
Available in I-temp, “AA” only.
* 24XX512 is used in this document as a generic part number for the 24AA512/24LC512/24FC512 devices.
2010 Microchip Technology Inc.
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