Intel® PXA270 Processor
Electrical, Mechanical, and Thermal Specification
Data Sheet
■
■
■
■
■
■
■
■
■
■
High-performance processor:
— Intel XScale® microarchitecture with
Intel® Wireless MMX™ Technology
— 7 Stage pipeline
— 32 KB instruction cache
— 32 KB data cache
— 2 KB “mini” data cache
— Extensive data buffering
256 Kbytes of internal SRAM for high
speed code or data storage preserved
during low-power states
High-speed baseband processor interface
(Mobile Scalable Link)
Rich serial peripheral set:
— AC’97 audio port
— I
2
S audio port
— USB Client controller
— USB Host controller
— USB On-The-Go controller
— Three high-speed UARTs (two with
hardware flow control)
— FIR and SIR infrared communications
port
Hardware debug features — IEEE JTAG
interface with boundary scan
Hardware performance-monitoring
features with on-chip trace buffer
Real-time clock
Operating-system timers
LCD Controller
Universal Subscriber Identity Module
interface
■
■
■
■
Low power:
— Wireless Intel Speedstep® Technology
— Less than 500 mW typical internal
dissipation
— Supply voltage may be reduced to
0.85 V
— Four low-power modes
— Dynamic voltage and frequency
management
High-performance memory controller:
— Four banks of SDRAM: up to 104 MHz
@ 2.5V, 3.0V, and 3.3V I/O interface
— Six static chip selects
— Support for PCMCIA and Compact
Flash
— Companion chip interface
Flexible clocking:
— CPU clock from 104 to 624 MHz
— Flexible memory clock ratios
— Frequency changes
— Functional clock gating
Additional peripherals for system
connectivity:
— SD Card / MMC Controller (with SPI
mode support)
— Memory Stick card controller
— Three SSP controllers
— Two I
2
C controllers
— Four pulse-width modulators (PWMs)
— Keypad interface with both direct and
matrix keys support
— Most peripheral pins double as GPIOs
Order Number 280002-003
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL
®
PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined. Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The PXA270
processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current
characterized errata are available on request.
This document and the software described in it are furnished under license and may only be used or copied in accordance with the terms of the
license. The information in this document is furnished for informational use only, is subject to change without notice, and should not be construed as a
commitment by Intel Corporation. Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this
document or any software that may be provided in association with this document. Except as permitted by such license, no part of this document may
be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of Intel Corporation.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling
1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
AlertVIEW, AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Connect, CT Media, Dialogic, DM3, EtherExpress,
ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share,
Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel
SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, LANDesk, LanRover, MCS, MMX, MMX
logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your
Command, RemoteExpress, Shiva, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside,
TokenExpress, Trillium, VoiceBrick, Vtune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United
States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © Intel Corporation, 2004
ii
Electrical, Mechanical, and Thermal Specification
Intel® PXA270 Processor
Contents
Contents
1
Introduction
.........................................................................................................1-1
1.1
About This Document.................................................................................1-1
1.1.1 Number Representation ................................................................1-1
1.1.2 Typographical Conventions ...........................................................1-1
1.1.3 Applicable Documents...................................................................1-2
2
3
Functional Overview
...........................................................................................2-1
Package Information...........................................................................................3-1
3.1
3.2
3.3
3.4
3.5
Package Information ..................................................................................3-1
Processor Materials....................................................................................3-6
Junction To Case Temperature Thermal Resistance .................................3-7
Processor Markings....................................................................................3-7
Tray Drawing ..............................................................................................3-8
Ball Map View.............................................................................................4-2
4.1.1 13x13 mm VF-BGA Ball map ........................................................4-2
4.1.2 23x23 mm PBGA Ball map............................................................4-6
Pin Usage ...................................................................................................4-9
Signal Types.............................................................................................4-27
Memory Controller Reset and Initialization...............................................4-28
Power-Supply Pins ...................................................................................4-29
Absolute Maximum Ratings........................................................................5-1
Operating Conditions..................................................................................5-1
5.2.1 Internal Power Domains ................................................................5-6
Power-Consumption Specifications............................................................5-6
DC Specification .........................................................................................5-8
Oscillator Electrical Specifications..............................................................5-9
5.5.1 32.768-kHz Oscillator Specifications .............................................5-9
5.5.2 13.000-MHz Oscillator Specifications..........................................5-11
CLK_PIO and CLK_TOUT Specifications ................................................5-12
48 MHz Output Specifications ..................................................................5-13
AC Test Load Specifications ......................................................................6-1
Reset and Power Manager Timing Specifications......................................6-2
6.2.1 Power-On Timing Specifications ...................................................6-2
6.2.2 Hardware Reset Timing.................................................................6-4
6.2.3 Watchdog Reset Timing ................................................................6-5
6.2.4 GPIO Reset Timing .......................................................................6-5
6.2.5 Sleep Mode Timing .......................................................................6-6
6.2.6 Deep-Sleep Mode Timing..............................................................6-7
4
Pin Listing and Signal Definitions
.....................................................................4-1
4.1
4.2
4.3
4.4
4.5
5
Electrical Specifications.....................................................................................5-1
5.1
5.2
5.3
5.4
5.5
5.6
5.7
6
AC Timing Specifications
...................................................................................6-1
6.1
6.2
Electrical, Mechanical, and Thermal Specification
iii
Intel® PXA270 Processor
Contents
6.3
6.4
6.5
6.6
6.7
6.2.7 Standby-Mode Timing .................................................................6-10
6.2.8 Idle-Mode Timing.........................................................................6-10
6.2.9 Frequency-Change Timing..........................................................6-10
6.2.10 Voltage-Change Timing...............................................................6-11
GPIO Timing Specifications .....................................................................6-11
Memory and Expansion-Card Timing Specifications................................6-12
6.4.1 Internal SRAM Read/Write Timing Specifications .......................6-12
6.4.2 SDRAM Parameters and Timing Diagrams.................................6-12
6.4.3 ROM Parameters and Timing Diagrams .....................................6-18
6.4.4 Flash Memory Parameters and Timing Diagrams.......................6-23
6.4.5 SRAM Parameters and Timing Diagrams ...................................6-33
6.4.6 Variable-Latency I/O Parameters and Timing Diagrams.............6-36
6.4.7 Expansion-Card Interface Parameters and Timing Diagrams.....6-40
LCD Timing Specifications .......................................................................6-43
SSP Timing Specifications .......................................................................6-44
JTAG Boundary Scan Timing Specifications............................................6-45
Index
..............................................................................................................................1-1
Figures
2-1 Intel® PXA270 Processor Block Diagram, Typical System................................2-2
3-1 13x13mm VF-BGA Intel® PXA270 Processor Package, top view .....................3-1
3-2 13x13mm VF-BGA Intel® PXA270 Processor Package, bottom view ...............3-2
3-3 13x13mm VF-BGA Intel® PXA270 Processor Package, side view ...................3-3
3-4 VF-BGA Product Information Decoder ...............................................................3-3
3-5 23x23 mm PBGA Intel® PXA270 Processor Package (Top View) ....................3-4
3-6 23x23 mm PBGA Intel® PXA270 Processor Package (Bottom View) ...............3-4
3-7 23x23 mm PBGA Intel® PXA270 Processor Package (Side View) ...................3-5
3-8 PBGA Product Information Decoder ..................................................................3-5
3-9 13x13mm VF-BGA Intel® PXA270 Processor Package, bottom view ...............3-6
3-10 Intel® PXA270 Processor Production Markings, (Laser Mark on Top Side)......3-7
4-1 13x13 mm VF-BGA Ball Map, Top View (upper left quarter) .............................4-2
4-2 13x13 mm VF-BGA Ball Map, Top View (upper right quarter) ...........................4-3
4-3 13x13 mm VF-BGA Ball Map, Top View (bottom left quarter) ...........................4-4
4-4 13x13 mm VF-BGA Ball Map, Top View (bottom right quarter) ........................4-5
4-5 23x23 mm PBGA Ball Map, Top View (Upper Left Quarter) ..............................4-6
4-6 23x23 mm PBGA Ball Map, Top View (Upper Right Quarter)............................4-7
4-7 23x23 mm PBGA Ball Map, Top View (Lower Left Quarter) ..............................4-8
4-8 23x23 mm PBGA Ball Map, Top View (Lower Right Quarter)............................4-9
6-1 AC Test Load .....................................................................................................6-2
6-2 Power On Reset Timing .....................................................................................6-3
6-3 Hardware Reset Timing .....................................................................................6-4
6-4 GPIO Reset Timing ............................................................................................6-5
6-5 Sleep Mode Timing ............................................................................................6-7
6-6 Deep-Sleep-Mode Timing ..................................................................................6-8
6-7 SDRAM Timing ................................................................................................6-15
6-8 SDRAM 4-Beat Read/4-Beat Write, Different Banks Timing............................6-16
6-9 SDRAM 4-Beat Write/4-Beat Write, Same Bank-Same Row Timing ...............6-17
6-10 SDRAM Fly-by DMA Timing.............................................................................6-18
iv
Electrical, Mechanical, and Thermal Specification
Intel® PXA270 Processor
Contents
6-11 32-Bit Non-burst ROM, SRAM, or Flash Read Timing .....................................6-20
6-12 32-Bit Burst-of-Eight ROM or Flash Read Timing ............................................6-21
6-13 Eight-Beat Burst Read from 16-Bit Burst-of-Four ROM or Flash Timing..........6-22
6-14 16-bit ROM/Flash/SRAM Read for 4/2/1 Bytes Timing ....................................6-23
6-15 Synchronous Flash Burst-of-Eight Read Timing ..............................................6-26
6-16 Synchronous Flash Stacked Burst-of-Eight Read Timing ................................6-27
6-17 First-Access Latency Configuration Timing......................................................6-28
6-18 Synchronous Flash Burst Read Example.........................................................6-30
6-19 32-Bit Flash Write Timing .................................................................................6-31
6-20 32-Bit Stacked Flash Write Timing ...................................................................6-32
6-21 16-Bit Flash Write Timing .................................................................................6-33
6-22 32-Bit SRAM Write Timing ...............................................................................6-35
6-23 16-bit SRAM Write for 4/2/1 Byte(s) Timing .....................................................6-36
6-24 32-Bit VLIO Read Timing .................................................................................6-38
6-25 32-Bit VLIO Write Timing..................................................................................6-39
6-26 Expansion-Card Memory or I/O 16-Bit Access Timing.....................................6-41
6-27 Expansion-Card Memory or I/O 16-Bit Access to 8-Bit Device Timing ............6-42
6-28 LCD Timing Definitions.....................................................................................6-43
6-29 SSP Master Mode Timing Definitions...............................................................6-44
6-30 Timing Diagram for SSP Slave Mode Transmitting Data
to an External Peripheral..................................................................................6-44
6-31 Timing Diagram for SSP Slave Mode Receiving Data
from External Peripheral...................................................................................6-45
6-32 JTAG Boundary-Scan Timing...........................................................................6-46
Tables
1-1 Supplemental Documentation ............................................................................1-2
3-1 Processor Material Properties ............................................................................3-7
4-1 Pin Usage Summary ........................................................................................4-10
4-2 Pin Usage and Mapping Notes.........................................................................4-27
4-3 Signal Types.....................................................................................................4-28
4-4 Memory Controller Pin Reset Values ...............................................................4-28
4-5 Discrete (13x13 VF-BGA) Power Supply Pin Summary...................................4-29
5-1 Absolute Maximum Ratings................................................................................5-1
5-2 Voltage, Temperature, and Frequency Electrical Specifications........................5-2
5-3 Memory Voltage and Frequency Electrical Specifications .................................5-4
5-4 Core Voltage and Frequency Electrical Specifications.......................................5-4
5-5 Internally Generated Power Domain Descriptions .............................................5-6
5-6 Core Voltage Specifications For Lower Power Modes .......................................5-6
5-7 Power-Consumption Specifications....................................................................5-7
5-8 Standard Input, Output, and I/O Pin DC Operating Conditions ..........................5-8
5-9 Typical 32.768-kHz Crystal Requirements .........................................................5-9
5-10 Typical External 32.768-kHz Oscillator Requirements ....................................5-11
5-11 Typical 13.000-MHz Crystal Requirements......................................................5-11
5-12 Typical External 13.000-MHz Oscillator Requirements....................................5-12
5-13 CLK_PIO Specifications ...................................................................................5-12
5-14 CLK_TOUT Specifications ...............................................................................5-12
5-15 48 MHz Output Specifications ..........................................................................5-13
6-1 Standard Input, Output, and I/O-Pin AC Operating Conditions ..........................6-1
6-2 Power-On Timing Specifications (OSCC[CRI] = 0) ............................................6-3
Electrical, Mechanical, and Thermal Specification
v
京公网安备 11010802033920号
EEWORLD
