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NUP4201DR2
Low Capacitance Surface
Mount TVS for High-Speed
Data Interfaces
The NUP4201DR2 transient voltage suppressor is designed to
protect equipment attached to high speed communication lines from
ESD, EFT, and lightning.
Features
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•
SO−8 Package
•
Peak Power
−
500 Watts 8 x 20
mS
•
ESD Rating:
SO−8 LOW CAPACITANCE
VOLTAGE SUPPRESSOR
500 WATTS PEAK POWER
6 VOLTS
PIN CONFIGURATION
AND SCHEMATIC
I/O 1 1
REF 1 2
REF 1 3
I/O 2 4
8 REF 2
7 I/O 4
6 I/O 3
5 REF 2
IEC 61000−4−2 (ESD) 15 kV (air) 8 kV (contact)
IEC 61000−4−4 (EFT) 40 A (5/50 ns)
IEC 61000−4−5 (lightning) 25 A (8/20
ms)
•
UL Flammability Rating of 94 V−0
•
Pb−Free Package is Available
Typical Applications
•
•
•
•
•
•
High Speed Communication Line Protection
USB Power and Data Line Protection
Video Line Protection
Base Stations
HDSL, IDSL Secondary IC Side Protection
Microcontroller Input Protection
8
1
SOIC−8
CASE 751
PLASTIC
MAXIMUM RATINGS
Rating
Peak Power Dissipation
8 x 20
mS
@ T
A
= 25°C (Note 1)
Junction and Storage Temperature Range
Lead Solder Temperature
−
Maximum 10 Seconds Duration
Symbol
P
pk
T
J
, T
stg
T
L
Value
500
−55
to +150
260
Unit
W
°C
°C
MARKING DIAGRAM
8
P4201
AYWWG
G
1
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Non−repetitive current pulse 8 x 20
mS
exponential decay waveform
P4201 = Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NUP4201DR2
NUP4201DR2G
Package
SO−8
SO−8
(Pb−Free)
Shipping
†
2500/Tape & Reel
2500/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2008
August, 2008
−
Rev. 6
1
Publication Order Number:
NUP4201DR2/D
NUP4201DR2
ELECTRICAL CHARACTERISTICS
Characteristic
Reverse Breakdown Voltage @ I
t
= 1.0 mA
Reverse Leakage Current @ V
RWM
= 5.0 Volts
Maximum Clamping Voltage @ I
PP
= 1.0 A, 8 x 20
mS
Maximum Clamping Voltage @ I
PP
= 10 A, 8 x 20
mS
Maximum Clamping Voltage @ I
PP
= 25 A, 8 x 20
mS
Between I/O Pins and Ground @ DC Bias = 0 V, 1.0 MHz
Between I/O Pins and I/O @ DC Bias = 0 V, 1.0 MHz
Symbol
V
BR
I
R
V
C
V
C
V
C
Capacitance
Capacitance
Min
6.0
N/A
N/A
N/A
N/A
−
−
Typ
−
−
−
−
−
5.0
2.5
Max
−
10
9.8
12
25
10
5.0
Unit
V
mA
V
V
V
pF
pF
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
UNIDIRECTIONAL
(Circuit tied to Pins 1 and 3 or 2 and 3)
Symbol
I
PP
V
C
V
RWM
I
R
V
BR
I
T
QV
BR
I
F
V
F
Z
ZT
I
ZK
Z
ZK
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
PP
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ V
RWM
Breakdown Voltage @ I
T
Test Current
Maximum Temperature Coefficient of V
BR
Forward Current
Forward Voltage @ I
F
Maximum Zener Impedance @ I
ZT
Reverse Current
Maximum Zener Impedance @ I
ZK
V
C
V
BR
V
RWM
I
F
I
I
R
V
F
I
T
V
I
PP
Uni−Directional TVS
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2
NUP4201DR2
TYPICAL CHARACTERISTICS
9
V
Z
, REVERSE BREAKDOWN (V)
I
R
, REVERSE LEAKAGE (mA)
−50
0
50
100
T, TEMPERATURE (°C)
150
200
8
7
6
5
4
3
2
1
0
−100
8
7
6
5
4
3
2
1
0
−100
−50
0
50
100
150
200
T, TEMPERATURE (°C)
Figure 1. Reverse Breakdown versus
Temperature
100
% OF PEAK PULSE CURRENT
90
80
70
60
50
40
30
20
10
0
0
20
40
t, TIME (ms)
60
80
t
P
t
r
PEAK VALUE I
RSM
@ 8
ms
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8
ms
HALF VALUE I
RSM
/2 @ 20
ms
V
C
, CLAMPING VOLTAGE (V)
35
30
25
20
15
10
5
0
0
Figure 2. Reverse Leakage versus
Temperature
10
20
30
40
50
60
70
80
90
I
PP
, PEAK PULSE CURRENT (A)
Figure 3. 8 x 20
ms
Pulse Waveform
Figure 4. Clamping Voltage versus Peak Pulse
Current
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3
NUP4201DR2
APPLICATIONS INFORMATION
The new NUP4201DR2 is a low capacitance TVS diode
array designed to protect sensitive electronics such as
communications systems, computers, and computer
peripherals against damage due to ESD events or transient
overvoltage voltage conditions. Because of its low
capacitance, it can be used in high speed I/O data lines. The
integrated design of the NUP4201DR2 offers surge rated,
low capacitance steering diodes and a TVS diode integrated
in a single package (SO−8). If a transient condition occurs,
the steering diodes will drive the transient to the positive rail
of the power supply or to ground. The TVS device protects
the power line against overvoltage conditions to avoid
damage to the power supply and any downstream
components.
NUP4201DR2 Configuration Options
The NUP4201DR2 is able to protect up to four data lines
against transient overvoltage conditions by driving them to
a fixed reference point for clamping purposes. The steering
diodes will be forward biased whenever the voltage on the
protected line exceeds the reference voltage (Vcc+Vf). The
diodes will force the transient current to bypass the sensitive
circuit.
Data lines are connected at pins 1, 4, 6 and 7. The negative
reference is connected at pins 5 and 8. These pins must be
connected directly to ground by using a ground plane to
minimize the PCB’s ground inductance. It is very important
to reduce the PCB trace lengths as much as possible to
minimize parasitic inductances.
Option 1
Protection of four data lines and the power supply using
Vcc as reference.
I/O 1
I/O 2
I/O 3
1
V
CC
2
3
4
I/O 3
I/O 4
8
7
6
5
I/O 4
Option 2
Protection of four data lines with bias and power supply
isolation resistor.
I/O 1
I/O 2
V
CC
1
10 K
2
3
4
I/O 3
I/O 4
8
7
6
5
Figure 6.
The NUP4201DR2 can be isolated from the power supply
by connecting a series resistor between pins 2 and 3 and Vcc.
A 10 kW resistor is recommended for this application. This
will maintain a bias on the internal TVS and steering diodes,
reducing their capacitance.
Option 3
Protection of four data lines using the internal TVS diode
as reference.
I/O 1
I/O 2
1
NC
NC
2
3
4
8
7
6
5
Figure 7.
Figure 5.
For this configuration, connect pins 2 and 3 directly to the
positive supply rail (Vcc), the data lines are referenced to the
supply voltage. The internal TVS diode prevents
overvoltage on the supply rail. Biasing of the steering diodes
reduces their capacitance.
In applications lacking a positive supply reference or
those cases in which a fully isolated power supply is
required, the internal TVS can be used as the reference. For
these applications, pins 2 and 3 are not connected. In this
configuration, the steering diodes will conduct whenever the
voltage on the protected line exceeds the working voltage of
the TVS plus one diode drop (Vc=Vf + V
TVS
).
ESD Protection of Power Supply Lines
When using diodes for data line protection, referencing to
a supply rail provides advantages. Biasing the diodes
reduces their capacitance and minimizes signal distortion.
Implementing this topology with discrete devices does have
disadvantages. This configuration is shown below:
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4
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