EELXT351PEA2 datasheet, PDF - EEWORLD Datasheet

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EELXT351PEA2: DescriptionPCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28; CategoryWireless rf/communication Telecom circuit; File Size980KB，49 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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EELXT351PEA2 Overview

PCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28

EELXT351PEA2 Parametric

Parameter Name	Attribute value
Maker	Intel
Parts packaging code	QLCC
package instruction	QCCJ,
Contacts	28
Reach Compliance Code	unknown
JESD-30 code	S-PQCC-J28
length	11.506 mm
Number of functions	1
Number of terminals	28
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Certification status	Not Qualified
Maximum seat height	4.572 mm
Nominal supply voltage	5 V
surface mount	YES
Telecom integrated circuit types	PCM TRANSCEIVER
Temperature level	INDUSTRIAL
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
width	11.506 mm

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LXT351

T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation

Datasheet

The LXT351 is a full-featured, fully-integrated transceiver for T1 and E1 short-haul

applications. The LXT351 is software switchable between T1 and E1 operation, and offers pulse

equalization settings for all short-haul T1 and E1 line interface (LIU) applications.

The LXT351 offers an Intel/Motorola compatible parallel port for microprocessor control. The

device incorporates advanced crystal-less digital jitter attenuation in either the transmit or

receive data path starting at 3 Hz. B8ZS/HDB3 encoding/decoding and unipolar or bipolar data

I/O are selectable. Loss of signal monitoring and a variety of diagnostic loopback modes can

also be selected.

Applications

■

SONET/SDH tributary interfaces

Digital cross connects

■

Public/private switching trunk line

interfaces

Microwave transmission systems

Product Features

■

Fully integrated transceivers for Short-Haul

T1 or E1 interfaces

Crystal-less digital jitter attenuation

— Select either transmit or receive path

— No crystal or high speed external clock

required

Meet or exceed specifications in ANSI

T1.403 and T1.408; ITU I.431, G.703,

G.736, G.775 and G.823; ETSI 300-166

and 300-233; and AT&T Pub 62411

Supports 75

(E1 coax), 100

(T1

twisted-pair) and 120

(E1 twisted-pair)

applications

Fully restores the received signal after

transmission through a cable with

attenuation of 18dB, at 1024 kHz

Five pulse equalization settings for T1

short-haul applications

■

Transmit/receive performance monitors

with Driver Fail Monitor Open (DFM) and

Loss of Signal (LOS) outputs

Selectable unipolar or bipolar data I/O and

B8ZS/HDB3 encoding/decoding

QRSS generator/detector for testing or

monitoring

Output short circuit current limit protection

Local, remote and analog loopback

capability

Compatible with Intel’s LXT360/361 T1/

E1 long haul/short haul transceiver

(Universal LIU)

Multiple register parallel interface

compatible with both Intel and Motorola

microprocessors

Available in 28-pin PLCC and 44-pin

PQFP packages

As of January 15, 2001, this document replaces the Level One document

Order Number: 249030-002

LXT351 — Integrated T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation.

04-Jan-2006

T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation — LXT351

Contents

1.0

2.0

Pin Assignments and Signal Descriptions

......................................................8

1.1

Mode Dependent Signals ...................................................................................... 8

Functional Description

........................................................................................... 13

2.1

2.2

Initialization.......................................................................................................... 13

2.1.1 Reset Operation .....................................................................................13

Transmitter .......................................................................................................... 13

2.2.1 Transmit Digital Data Interface ............................................................... 13

2.2.2 Transmit Monitoring................................................................................ 14

2.2.3 Transmit Drivers .....................................................................................14

2.2.4 Transmit Idle Mode................................................................................. 14

2.2.5 Transmit Pulse Shape ............................................................................ 14

Receiver .............................................................................................................. 15

2.3.1 Receive Data Recovery.......................................................................... 15

Jitter Attenuation .................................................................................................15

Diagnostic Mode Operation ................................................................................. 16

2.5.1 Loopback Modes .................................................................................... 16

2.5.1.1 Local Loopback .........................................................................16

2.5.1.2 Analog Loopback.......................................................................18

2.5.1.3 Remote Loopback ..................................................................... 18

2.5.1.4 Dual Loopback .......................................................................... 19

2.5.2 Internal Pattern Generation .................................................................... 19

2.5.2.1 Transmit All Ones ...................................................................... 19

2.5.2.2 Quasi-Random Signal Source (QRSS) ..................................... 20

2.5.3 Error Insertion and Detection ................................................................. 21

2.5.3.1 Bipolar Violation Insertion (INSBPV) ......................................... 21

2.5.3.2 Logic Error Insertion (INSLER).................................................. 21

2.5.3.3 Bipolar Violation Detection (BPV).............................................. 21

2.5.3.4 HDB3 Code Violation Detection (CODEV) ................................ 21

2.5.3.5 HDB3 Zero Substitution Violation Detection (ZEROV) ..............21

2.5.4 Alarm Condition Monitoring .................................................................... 22

2.5.4.1 Loss of Signal ............................................................................ 22

2.5.4.2 Alarm Indication Signal Detection .............................................22

2.5.4.3 Driver Failure Open Mode ......................................................... 22

2.5.4.4 Elastic Store Overflow/Underflow .............................................. 22

2.5.4.5 Built-In Self Test ........................................................................ 23

Parallel Microprocessor Interface ........................................................................ 23

2.6.1 Interrupt Handling ................................................................................... 23

2.3

2.4

2.5

2.6

3.0

4.0

.................................................................................................24

Application Information

......................................................................................... 29

4.1

4.2

4.3

4.4

Transmit Return Loss ..........................................................................................29

Transformer Data ................................................................................................ 29

Application Circuit................................................................................................ 29

Line Protection .................................................................................................... 29

4.4.1 LXT351 Application Circuit ..................................................................... 31

Datasheet

LXT351 — T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation

5.0

6.0

7.0

Test Specifications

.................................................................................................. 33

Mechanical Specifications

................................................................................... 45

6.1

Top Label Markings............................................................................................. 47

Product Ordering Information

............................................................................. 48

Figures

LXT351 Block Diagram ......................................................................................... 7

LXT351 Pin Assignments ...................................................................................... 8

50% Duty Cycle Coding ...................................................................................... 14

Local Loopback ................................................................................................... 16

TAOS with LLOOP .............................................................................................. 17

Analog Loopback ................................................................................................ 18

Remote Loopback ............................................................................................... 19

Dual Loopback .................................................................................................... 19

TAOS Data Path ................................................................................................. 20

QRSS Mode ........................................................................................................ 20

Typical T1/E1 LXT351 Application ...................................................................... 32

2.048 Mbps E1 Pulse (See

Table 24).................................................................

1.544 Mbps T1 Pulse, DSX-1 (See

Table 25)

..................................................... 36

Transmit Clock Timing ........................................................................................ 37

Receive Clock Timing ......................................................................................... 38

Intel Address/Data Bus Timing............................................................................ 40

Motorola Address/Data Bus Timing .................................................................... 41

Typical T1 Jitter Tolerance at 36 dB ................................................................... 41

Typical E1 Jitter Tolerance at 43 dB ................................................................... 42

Typical E1 Jitter Attenuation ............................................................................... 43

Typical T1 Jitter Attenuation................................................................................ 44

Plastic Leaded Chip Carrier Package Specifications .......................................... 45

Plastic Quad Flat Package Specifications........................................................... 46

Sample PLCC Package – Intel

NLXT351PE Transceiver ................................. 47

Sample Pb-Free (RoHS-Compliant) PLCC Package – Intel

EELXT351PE Trans-

ceiver47

Ordering Information Matrix – Sample ................................................................ 49

Datasheet

T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation — LXT351

Tables

LXT351 Clock and Data Pin Assignments by Mode1............................................ 8

LXT351 Processor Interface Pins.......................................................................... 9

LXT351 Signal Descriptions ................................................................................ 10

Diagnostic Mode Summary ................................................................................. 16

Control Register #1 Read/Write, Address (A7-A0) = x010000x ..........................25

Equalizer Control Input Settings .........................................................................25

Control Register #2 Read/Write, Address (A7-A0) = x010001x ..........................25

Control Register #3 Read/Write, Address (A7-A0) = x010010x ..........................26

Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x.................... 26

Transition Status Register Read Only, Address (A7-A0) = x010100x................. 27

Performance Status Register Read Only, Address (A7-A0) = x010101x ............ 27

Control Register #4 Read/Write, Address (A7-A0) = x010111x ..........................28

E1 Transmit Return Loss Requirements ............................................................. 29

Transmit Return Loss (2.048 Mbps).................................................................... 30

Transmit Return Loss (1.544 Mbps).................................................................... 30

Transformer Specifications.................................................................................. 30

Recommended Transformers..............................................................................31

Absolute Maximum Ratings................................................................................. 33

Recommended Operating Conditions ................................................................. 33

DC Electrical Characteristics............................................................................... 34

Analog Characteristics ........................................................................................ 34

2.048 Mbps E1 Pulse Mask Specifications ........................................................ 35

1.544 Mbps T1, DSX-1 Pulse Mask Corner Point Specifications ........................ 36

Master and Transmit Clock Timing Characteristics for T1 Operation

(See

Figure 14)

................................................................................................... 37

Master and Transmit Clock Timing Characteristics for E1 Operation

(See

Figure 14)

................................................................................................... 37

Receive Timing Characteristics for T1 Operation (See

Figure 15)......................

Receive Timing Characteristics for E1 Operation (See

Figure 15)

.....................38

20 MHz Intel Bus Parallel I/O Timing Characteristics (See

Figure 16)................

16.78 MHz Motorola Bus Parallel I/O Timing Characteristics (See

Figure 17)

... 40

Product Ordering Information ..............................................................................48

Datasheet

EELXT351PEA2 Related Products

	EELXT351PEA2	NLXT351PE.A2	NLXT351PEA2	EELXT351PE.A2
Description	PCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28	Telecom IC, PQCC28	PCM Transceiver, 1-Func, PQCC28, PLASTIC, LCC-28	Telecom IC, PQCC28
Maker	Intel	Intel	Intel	Intel
package instruction	QCCJ,	QCCJ, LDCC28,.5SQ	QCCJ,	QCCJ, LDCC28,.5SQ
Reach Compliance Code	unknown	unknown	unknown	unknow
JESD-30 code	S-PQCC-J28	S-PQCC-J28	S-PQCC-J28	S-PQCC-J28
Number of terminals	28	28	28	28
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	QCCJ	QCCJ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	J BEND	J BEND	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD

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