Product Specification
PE42520
UltraCMOS
®
SPDT RF Switch
9 kHz - 13 GHz
Product Description
The PE42520 SPDT absorptive RF switch is designed for
use in Test/ATE and other high performance wireless
applications. This broadband general purpose switch
maintains excellent RF performance and linearity from 9
kHz through 13 GHz. This switch is a pin-compatible
upgraded version of PE42552 with higher power handling
of 36 dBm continuous wave (CW) and 38 dBm
instantaneous power in 50Ω @ 8 GHz. The PE42520
exhibits high isolation, fast settling time, and is offered in a
3x3 mm QFN package.
The PE42520 is manufactured on Peregrine’s
UltraCMOS
®
process, a patented variation of silicon-on-
insulator (SOI) technology on a sapphire substrate,
offering the performance of GaAs with the economy and
integration of conventional CMOS.
Features
HaRP™ technology enhanced
Fast settling time
No gate and phase lag
No drift in insertion loss and phase
High power handling @ 8 GHz in 50Ω
36 dBm CW
38 dBm instantaneous power
26 dBm terminated port
High linearity
66 dBm IIP3
Low insertion loss
0.8 dB @ 3 GHz
0.9 dB @ 10 GHz
2.0 dB @ 13 GHz
Figure 1. Functional Diagram
High isolation
45 dB @ 3 GHz
31 dB @ 10 GHz
18 dB @ 13 GHz
ESD performance
4kV HBM on RF pins to GND
2.5kV HBM on all pins
1kV CDM on all pins
Figure 2. Package Type
16-lead 3x3 mm QFN
DOC-50572
Document No. DOC-12714-4 |
www.psemi.com
©2012-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 16
PE42520
Product Specification
Table 1. Electrical Specifications
@ 25°C, V
DD
= 3.3V
,
Vss
EXT
= 0V or V
DD
= 3.4V, Vss
EXT
= -3.4V,
(Z
S
= Z
L
= 50Ω) unless otherwise noted
Parameter
Operation frequency
9 kHz –10 MHz
10 MHz – 3 GHz
3 GHz – 7.5 GHz
7.5 GHz – 10 GHz
10 GHz – 12 GHz
12 GHz –13 GHz
9 kHz –10 MHz
10 MHz – 3 GHz
3 GHz – 7.5 GHz
7.5 GHz – 10 GHz
10 GHz – 12 GHz
12 GHz –13 GHz
9 kHz –10 MHz
10 MHz – 3 GHz
3 GHz – 7.5 GHz
7.5 GHz – 10 GHz
10 GHz – 12 GHz
12 GHz –13 GHz
9 kHz –10 MHz
10 MHz – 3 GHz
3 GHz – 7.5 GHz
7.5 GHz – 10 GHz
10 GHz – 12 GHz
12 GHz –13 GHz
9 kHz –10 MHz
10 MHz – 3 GHz
3 GHz – 7.5 GHz
7.5 GHz – 10 GHz
10 GHz – 12 GHz
12 GHz –13 GHz
9 kHz –10 MHz
10 MHz – 3 GHz
3 GHz – 7.5 GHz
7.5 GHz – 10 GHz
10 GHz – 12 GHz
12 GHz –13 GHz
10 MHz – 13 GHz
834 MHz, 1950 MHz
834 MHz, 1950 MHz, and 2700 MHz
50% CTRL to 0.05 dB final value
50% CTRL to 90% or 10% of final value
70
46
35
24
16
13
80
42
41
26
16
13
Path
Condition
Min
9 kHz
0.60
0.80
0.85
0.90
1.20
2.00
90
54
38
27
19
17
90
45
44
31
20
18
23
17
15
18
20
10
23
17
15
18
18
10
32
24
21
13
8
5
Fig. 5
120
66
15
5.5
20
9.5
Typ
Max
13 GHz
0.80
1.00
1.05
1.10
1.65
2.70
Unit
As
shown
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
dBm
μs
μs
Insertion loss
RFC–RFX
Isolation
RFX–RFX
Isolation
RFC–RFX
Return loss (active port)
RFC-RFX
Return loss (common port)
RFC-RFX
Return loss (terminated port)
RFX
Input 0.1 dB compression point
1
Input IP2
Input IP3
Settling time
Switching time
RFC–RFX
RFC–RFX
RFC–RFX
Note 1: The input 0.1 dB compression point is a linearity figure of merit. Refer to
Table 3
for the RF input power P
IN
(50Ω)
©2012-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 16
Document No. DOC-12714-4 |
UltraCMOS
®
RFIC Solutions
PE42520
Product Specification
Figure 3. Pin Configuration (Top View)
Table 3. Operating Ranges
Parameter
Supply voltage (normal
mode, Vss
EXT
= 0V)
1
Supply voltage (bypass
mode, Vss
EXT
= -3.4V,
V
DD
≥
3.4V for full spec.
compliance)
2
Negative supply voltage
(bypass mode)
2
Supply current (normal
mode, Vss
EXT
= 0V)
1
Supply current (bypass
mode, Vss
EXT
= -3.4V)
2
Negative supply current
(bypass mode, Vss
EXT
=
-3.4V)
2
Symbol
V
DD
Min
2.3
Typ
Max
5.5
Unit
V
V
DD
2.7
3.4
5.5
V
Vss
EXT
I
DD
I
DD
-3.6
120
50
-3.2
200
80
V
µA
µA
I
SS
-40
-16
µA
Table 2. Pin Descriptions
Pin #
2
1, 3, 4, 5,
6, 8, 9, 10,
12
7
11
13
14
15
16
Pad
Notes:
Digital input high
(CTRL)
Description
Digital input low (CTRL)
V
IH
V
IL
I
CTRL
1.17
-0.3
3.6
0.6
10
V
V
µA
Pin Name
RF1
1
GND
RFC
1
RF2
1
Vss
EXT
2
RF port 1
Digital input current
Ground
RF common
RF port 2
External Vss negative voltage control
Digital control logic input
Logic Select - used to determine the
definition for the CTRL pin (see
Table 5)
Supply voltage
Exposed pad: ground for proper operation
RF input power, CW
(RFC-RFX)
3
9 kHz
≤
10 MHz
10 MHz
≤
8 GHz
8 GHz
≤
13 GHz
P
IN-CW
Fig. 4
36
Fig. 5
dBm
dBm
dBm
CTRL
LS
V
DD
GND
RF input power, pulsed
(RFC-RFX)
4
P
9 kHz
≤
10 MHz
IN-PULSED
10 MHz
≤
13 GHz
RF input power, hot
switch, CW
3
9 kHz
≤
300 kHz
300 kHz
≤
13 GHz
RF input power into
terminated ports, CW
(RFX)
3
9 kHz
≤
600 kHz
600 kHz
≤
13 GHz
Operating temperature
range
Fig. 4
Fig. 5
dBm
dBm
P
IN-HOT
Fig. 4
20
dBm
dBm
1. RF pins 2, 7, and 11 must be at 0V DC. The RF pins do not require
DC blocking capacitors for proper operation if the 0V DC requirement
is met
2. Use Vss
EXT
(pin 13) to bypass and disable internal negative voltage
generator. Connect Vss
EXT
(pin 13) to GND (Vss
EXT
= 0V) to enable
internal negative voltage generator
P
IN,TERM
Fig. 4
26
T
OP
-40
+25
+85
dBm
dBm
°C
Notes: 1. Normal mode: connect Vss
EXT
(pin 13) to GND (Vss
EXT
= 0V) to
enable internal negative voltage generator
2. Bypass mode: use Vss
EXT
(pin 13) to bypass and disable internal
negative voltage generator
3. 100% duty cycle, all bands, 50Ω
4. Pulsed, 5% duty cycle of 4620 µs period, 50Ω
Document No. DOC-12714-4 |
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©2012-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 16
PE42520
Product Specification
Table 4. Absolute Maximum Ratings
Parameter/Condition
Supply voltage
Digital input voltage (CTRL)
LS input voltage
RF input power, CW
(RFC-RFX)
1
9 kHz
≤
10 MHz
10 MHz
≤
8 GHz
8 GHz
≤
13 GHz
Symbol
V
DD
V
CTRL
V
LS
Min
-0.3
-0.3
-0.3
Max
5.5
3.6
3.6
Unit
V
V
V
Switching Frequency
The PE42520 has a maximum 25 kHz switching
rate when the internal negative voltage generator
is used (pin 13 = GND). The rate at which the
PE42520 can be switched is only limited to the
switching time (Table
1)
if an external negative
supply is provided (pin 13 = Vss
EXT
).
Switching frequency describes the time duration
between switching events. Switching time is the
time duration between the point the control signal
reaches 50% of the final value and the point the
output signal reaches within 10% or 90% of its
target value.
Optional External Vss Control (Vss
EXT
)
P
IN-CW
Fig. 4
36
Fig. 5
dBm
dBm
dBm
RF input power, pulsed
(RFC-RFX)
2
P
IN-PULSED
9 kHz
≤
10 MHz
10 MHz
≤
13 GHz
RF input power into terminated
ports, CW (RFX)
1
9 kHz
≤
10 MHz
10 MHz
≤
13 GHz
Storage temperature range
ESD voltage HBM
3
RF pins to GND
All pins
ESD voltage MM
4
, all pins
ESD voltage CDM
5
, all pins
Fig. 4
Fig. 5
dBm
dBm
P
IN,TERM
Fig. 4
26
-65
150
4000
2500
200
1000
dBm
dBm
°C
V
V
V
V
T
ST
V
ESD,HBM
V
ESD,MM
V
ESD,CDM
For proper operation, the Vss
EXT
control pin must
be grounded or tied to the Vss voltage specified in
Table 3.
When the Vss
EXT
control pin is grounded,
FETs in the switch are biased with an internal
negative voltage generator. For applications that
require the lowest possible spur performance,
Vss
EXT
can be applied externally to bypass the
internal negative voltage generator.
Spurious Performance
The typical spurious performance of the PE42520
is -152 dBm when Vss
EXT
= 0V (pin 13 = GND). If
further improvement is desired, the internal
negative voltage generator can be disabled by
setting Vss
EXT
= -3.4V.
Table 5. Control Logic Truth Table
LS
0
CTRL
0
1
0
1
RFC-RF1
off
on
on
off
RFC-RF2
on
off
off
on
Notes: 1. 100% duty cycle, all bands, 50Ω
2.
Pulsed, 5% duty cycle of 4620
µs
period, 50Ω
3. Human Body Model (MIL-STD 883 Method 3015)
4. Machine Model (JEDEC JESD22-A115)
5. Charged Device Model (JEDEC JESD22-C101)
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be
restricted to the limits in the Operating Ranges
table. Operation between operating range
maximum and absolute maximum for extended
periods may reduce reliability.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS
®
device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
®
devices are immune to latch-up.
0
1
1
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the
PE42520 in the 16-lead 3x3 mm QFN package is
MSL3.
Logic Select (LS)
The Logic Select feature is used to determine the
definition for the CTRL pin.
Document No. DOC-12714-4 |
UltraCMOS
®
RFIC Solutions
©2012-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 16
PE42520
Product Specification
Figure 4. Power De-rating Curve for 9 kHz – 10 MHz (50Ω)
40
35
30
25
Input Power (dBm)
Max. RF Input Power, CW and Pulsed, (‐40°C to +85°C Ambient)
20
15
10
5
0
‐5
1
10
100
Frequency (kHz)
1000
10000
Document No. DOC-12714-4 |
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©2012-2014 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 16
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