395011914 datasheet, PDF - EEWORLD Datasheet

395011914: DescriptionBarrier Strip Terminal Block, 8A, 1 Row(s), 1 Deck(s),; CategoryThe connector; File Size140KB，3 Pages; ManufacturerMolex; Websitehttps://www.molex.com/molex/home; Environmental Compliance

Download Datasheet Parametric View All

395011914 Overview

Barrier Strip Terminal Block, 8A, 1 Row(s), 1 Deck(s),

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Molex
Objectid	1718389146
Reach Compliance Code	unknown
ECCN code	EAR99
compound_id	71458581
Other features	PA66
Fastening method	SOLDER
Installation type	BOARD
Number of layers	1
Rows	1
Number of channels	14
Rated current	8 A
Rated voltage	300 V
Terminal and terminal strip types	BARRIER STRIP TERMINAL BLOCK

2410 WinCE adds three serial port drivers, should the infrared be removed?: I followed the method on the Internet to add three serial port drivers for 2410wince, and changed the registry comment of the infrared part to serial port 3, using the same driver as serial port 1 and...; ld21502839 Embedded System

Looking for high frequency (50M or above) rectifier diodes! ! Very urgent: Hello everyone, can you recommend me a high frequency (50M or above) rectifier diode? ! ! !...; annezuo Embedded System

Please help analyze how the following negative voltage is generated and the direction of current flow, thank you: ...; cxq742536574 Analog electronics

Sharing the process of WEBENCH design + Inductive Sensing: In the sensor design interface, the first item is [b]Inductive Sensing. I was not sure what it was for, so I designed one to see. [/font][/size][/color][color=rgb(85, 85, 85)][size=12px][font=Tahoma] ...; tianshuihu Analogue and Mixed Signal

STM32 drives DC motor: I use STM32 to output a 50% duty cycle PWM wave. The waveform is correct at the input end of the optocoupler isolation, but it is not correct at the output end. I would like to ask you to help me find...; 小冷 stm32/stm8

AlteraFPGA Introduction and Related Technologies: The attachment includes: [size=11pt][b]Transceiver family product introduction, [size=11pt]40-nm[/size][b][size=11pt]transceiver and clock architecture, [b][size=11pt]Design and experiment using[/size...; jyl FPGA/CPLD

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components