Active Delay Line, 1-Func, 5-Tap, True Output, CMOS, DIP-14/8
| Parameter Name | Attribute value |
| Is it lead-free? | Lead free |
| Is it Rohs certified? | conform to |
| Maker | Data Delay Devices |
| Parts packaging code | DIP |
| package instruction | DIP-14/8 |
| Contacts | 14 |
| Reach Compliance Code | compliant |
| Other features | INPUT TO 1ST TAP DELAY = 8+-2NS |
| series | HC/UH |
| JESD-30 code | R-XDIP-T8 |
| JESD-609 code | e3 |
| Logic integrated circuit type | ACTIVE DELAY LINE |
| Number of functions | 1 |
| Number of taps/steps | 5 |
| Number of terminals | 8 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| Output polarity | TRUE |
| Package body material | UNSPECIFIED |
| encapsulated code | DIP |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| programmable delay line | NO |
| Certification status | Not Qualified |
| Maximum seat height | 7.747 mm |
| Maximum supply voltage (Vsup) | 5.25 V |
| Minimum supply voltage (Vsup) | 4.75 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin (Sn) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| Total delay nominal (td) | 18 ns |
| width | 7.62 mm |
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