Programmable V
COM
Calibrator with EEPROM
ISL24202
The ISL24202 is an 8-bit programmable current sink that can be
used in conjunction with an external voltage divider to generate a
voltage source (V
COM
) positioned between the analog supply
voltage and ground. The current sink’s full-scale range is
controlled by an external resistor, R
SET
. With the appropriate
choice of external resistors R
1
and R
2
, the V
COM
voltage range
can be controlled between any arbitrary voltage range. The
ISL24202 has an 8-bit data register and 8-bit EEPROM for storing
both a volatile and a permanent value for its output, accessible
through a single up/down counter interface pin (CTL). After the
part is programmed with the desired V
COM
value, the Counter
Enable pin (CE) can be grounded to prevent further changes. On
every power-up the EEPROM contents are automatically
transferred to the data register, and the pre-programmed output
voltage appears at the V
OUT
pin.
The ISL24202 can be used with a high output drive buffer
amplifier, which allows it to directly drive the V
COM
input of an
LCD panel.
The ISL24202 is available in an 8 Ld 3mm x 3mm TDFN
package. This package has a maximum height of 0.8mm for very
low profile designs. The ambient operating temperature range is
-40°C to +85°C
.
Features
• Adjustable 8-Bit, 256-Step, Current Sink Output
• On-Chip 8-Bit EEPROM
• Up/Down Counter Interface
• Guaranteed Monotonic Over-Temperature
• 4.5V to 19.0V Analog Supply Range for Normal Operation
(10.8V Minimum Analog Supply Voltage for Programming)
• 2.25V to 3.6V Logic Supply Voltage Operating Range
• Pb-free (RoHS-Compliant)
• Ultra-Thin 8 Ld TDFN (3 x 3 x 0.8mm Max)
Applications
• LCD Panel V
COM
Generator
• Electrophoretic Display V
COM
Generator
Related Literature
• See AN1633 for ISL24202 Evaluation Board Application Note
“ISL24202IRTZ-EVALZ Evaluation Board User Guide” (Coming
Soon)
V
DD
AV
DD
5
2
I/O PIN*
MICRO-
CONTROLLER
6
CTL
OUT
R
1
1
LCD PANEL
I/O PIN
7
CE
ISL24202
R
2
V
COM
SET
8
EL5411T
R
SET
* 0, 1, TRI-STATE
4
FIGURE 1. TYPICAL ISL24202 APPLICATION
March 15, 2011
FN7587.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL24202
Block Diagram
V
DD
5
V
DD
R
BIAS
R
BIAS
CE
7
8-BIT EEPROM
CS
8
SET
DIGITAL
INTERFACE
UP/DOWN
COUNTER
DAC
REGISTERS
A1
ANALOG DCP
AND
CURRENT SINK
Q1
1
OUT
AV
DD
2
3
6
DNC
CTL
4
GND
FIGURE 2. BLOCK DIAGRAM OF THE ISL24202
Pin Descriptions
PIN NAME PIN #
OUT
1
FUNCTION
Adjustable Sink Current Output Pin. The sink current into
the OUT pin is equal to the DAC setting times the
maximum adjustable sink current divided by 256. See
the “SET” pin function description below (pin 8) for
setting the maximum adjustable sink current.
High-Voltage Analog Supply. Bypass to GND with 0.1µF
capacitor.
Do Not Connect to external circuitry. It is acceptable to
ground this pin.
Ground connection.
Digital power supply input. Bypass to GND with 0.1µF
de-coupling capacitor.
Up/Down Control for internal counter and Internal
EEPROM Programming Control Input. When CE is high:
A low-to-mid transition increments the 8-bit counter,
adding 1 to the DAC setting, increasing the OUT sink
current, and lowering the divider voltage at the OUT pin.
A high-to-mid transition decrements the 8-bit counter,
subtracting 1 from the DAC setting, decreasing the OUT
sink current, and increasing the divider voltage at the
OUT pin.
To program the EEPROM, take this pin to >4.9V (see
“CTL EEPROM Programming Signal Time” in the
“Electrical Specifications” table on page 5 for details).
Float when not in use.
Counter Enable Pin. Connect CE to V
DD
to enable
adjustment of the output sink current. Float or connect
CE to GND to prevent further adjustment or
programming (Note: the CE pin has an internal 500nA
pull-down sink current). The EEPROM value will be
copied to the register on a V
OH
to V
OL
transition.
Maximum Sink Current Adjustment Pin. Connect a
resistor from SET to GND to set the maximum
adjustable sink current of the OUT pin. The maximum
adjustable sink current is equal to (AV
DD
/20) divided
by R
SET
.
Thermal pad should be connected to system ground
plane to optimize thermal performance.
Pin Configuration
ISL24202
(8 LD TDFN)
TOP VIEW
OUT 1
A
VDD
2
DNC 3
GND 4
8 SET
7 CE
A
VDD
DNC
GND
V
DD
CTL
2
3
4
5
6
PAD
6 CTL
5 V
DD
(*CONNECT THERMAL PAD TO GND)
CE
7
SET
8
PAD
-
2
FN7587.0
March 15, 2011
ISL24202
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL24202IRTZ
ISL24202IRTZ-EVALZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page
ISL24202.
For more information on MSL please see techbrief
TB363.
PART
MARKING
202Z
Evaluation Board
INTERFACE
COUNTER
TEMP RANGE
(°C)
-40 to +85
8 Ld 3x3 TDFN
PACKAGE
(Pb-Free)
PKG.
DWG. #
L8.3x3A
3
FN7587.0
March 15, 2011
ISL24202
Absolute Maximum Ratings
Supply Voltage
AV
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4V
Input Voltage with respect to Ground
SET, CTL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AV
DD
+0.3V
CE and WP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DD
+0.3V
Output Voltage with respect to Ground
OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AV
DD
Continuous Output Current
OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
ESD Ratings
Human Body Model (Tested per JESD22-A114) . . . . . . . . . . . . . . . . . 7kV
Machine Model (Tested per JESD22-A115). . . . . . . . . . . . . . . . . . . . 300V
Charged Device Model (Tested per JESD22-C101). . . . . . . . . . . . . . . 2kV
Latch Up (Tested per JESD 78, Class II, Level A). . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
8 Ld TDFN Package (Notes 4, 5). . . . . . . . .
53
11
Moisture Sensitivity (see Technical Brief TB363)
All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Operating Range
AV
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 19V
V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.25V to 3.6V
Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Test Conditions: V
DD
= 3.3V, AV
DD
= 18V, R
SET
= 5kΩ, R
1
= 10kΩ, R
2
= 10kΩ, (See Figure 5). Typicals are at
T
A
= +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
UNITS
DC CHARACTERISTICS
V
DD
AV
DD
AV
DD
I
DD
I
AVDD
SET
ZSE
SET
FSE
V
OUT
SET
VD
I
OUT
INL
DNL
V
DD
Supply Range - Operating
AV
DD
Supply Range Supporting EEPROM Programming
AV
DD
Supply Range for Wide-Supply Operation without
EEPROM Programming
V
DD
Supply Current
AV
DD
Supply Current
SET Zero-Scale Error
SET Full-Scale Error
OUT Voltage Range
SET Voltage Drift
Maximum OUT Sink Current
Integral Non-Linearity
Differential Non-Linearity
V
SET
+ 1.75
7
4
±2
±1
CTL = 0.5*V
DD
CTL = 0.5*V
DD
2.25
10.8
4.5
40
24
3.6
19
19
65
38
±3
±8
AV
DD
V
V
V
µA
µA
OUT PIN CHARACTERISTICS
LSB
LSB
V
µV/°C
mA
LSB
LSB
EEPROM CHARACTERISTICS
t
PROG
V
IH
V
IL
I
CS_PD
I
CTL
t
ST
t
READ
EEPROM Programming Time (internal)
100
ms
UP/DOWN COUNTER CONTROL INPUTS (SEE FIGURE 11)
CE and CTL Input Logic High Threshold
CE and CTL Input Logic Low Threshold
CE Input Pull Down Current Sink
CTL Input Bias Current
CTL = GND (sourcing)
CTL = V
DD
(sinking)
CE to CTL Start Delay
EEPROM Recall Time (after CE de-asserted)
50
10
0.5
7
7
0.7*V
DD
0.3*V
DD
1.5
15
15
V
V
µA
µA
µA
µs
ms
4
FN7587.0
March 15, 2011
ISL24202
Test Conditions: V
DD
= 3.3V, AV
DD
= 18V, R
SET
= 5kΩ, R
1
= 10kΩ, R
2
= 10kΩ, (See Figure 5). Typicals are at
T
A
= +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C.
(Continued)
SYMBOL
t
H_REJ
t
L_REJ
t
H_MIN
t
L_MIN
t
MTC
V
PROG
t
PROG
t
H_PROP
t
L_PROP
PARAMETER
CTL High Pulse Rejection Width
CTL Low Pulse Rejection Width
CTL High Minimum Valid Pulse Width
CTL Low Minimum Valid Pulse Width
CTL Minimum Time Between Counts
CTL EEPROM Program Voltage (see Figure 9)
CTL EEPROM Programming Signal Time
CTL High-to-Mid to OUT Propagation Time
CTL Low-to-Mid to OUT Propagation Time
200
200
10
4.9
200
65
65
19
TEST CONDITIONS
MIN
(Note 6)
TYP
MAX
(Note 6)
20
20
UNITS
µs
µs
µs
µs
µs
V
µs
µs
µs
Electrical Specifications
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
5
FN7587.0
March 15, 2011
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