DATASHEET
ISL8103
Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
The ISL8103 is a three-phase PWM control IC with
integrated MOSFET drivers. It provides a precision voltage
regulation system for multiple applications including, but not
limited to, high current low voltage point-of-load converters,
embedded applications and other general purpose low
voltage medium to high current applications.The integration
of power MOSFET drivers into the controller IC marks a
departure from the separate PWM controller and driver
configuration of previous mulitphase product families. By
reducing the number of external parts, this integration allows
for a cost and space saving power management solution.
Output voltage can be programmed using the on-chip DAC
or an external precision reference. A two bit code programs
the DAC reference to one of 4 possible values (0.6V, 0.9V,
1.2V and 1.5V). A unity gain, differential amplifier is provided
for remote voltage sensing, compensating for any potential
difference between remote and local grounds. The output
voltage can also be offset through the use of single external
resistor. An optional droop function is also implemented and
can be disabled for applications having less stringent output
voltage variation requirements or experiencing less severe
step loads.
A unique feature of the ISL8103 is the combined use of both
DCR and r
DS(ON)
current sensing. Load line voltage
positioning and overcurrent protection are accomplished
through continuous inductor DCR current sensing, while
r
DS(ON)
current sensing is used for accurate channel-current
balance. Using both methods of current sampling utilizes the
best advantages of each technique.
Protection features of this controller IC include a set of
sophisticated overvoltage and overcurrent protection.
Overvoltage results in the converter turning the lower
MOSFETs ON to clamp the rising output voltage and protect
the load. An OVP output is also provided to drive an optional
crowbar device. The overcurrent protection level is set
through a single external resistor. Other protection features
include protection against an open circuit on the remote
sensing inputs. Combined, these features provide advanced
protection for the output load.
FN9246
Rev 1.00
July 21, 2008
Features
• Integrated Mulitphase Power Conversion
- 1, 2, or 3 Phase Operation
• Precision Output Voltage Regulation
- Differential Remote Voltage Sensing
- W0.8% System Accuracy Over-Temperature
(for REF = 0.6V and 0.9V)
- ±0.5% System Accuracy Over-Temperature
(for REF = 1.2V and 1.5V)
- Usable for Output Voltages not Exceeding 2.3V
- Adjustable Reference-Voltage Offset
• Precision Channel Current Sharing
- Uses Loss-Less r
DS(ON)
Current Sampling
• Optional Load Line (Droop) Programming
- Uses Loss-Less Inductor DCR Current Sampling
• Variable Gate-Drive Bias - 5V to 12V
• Internal or External Reference Voltage Setting
- On-Chip Adjustable Fixed DAC Reference Voltage with
2-bit Logic Input Selects from Four Fixed Reference
Voltages (0.6V, 0.9V, 1.2V, 1.5V)
- Reference can be Changed Dynamically
- Can use an External Voltage Reference
• Overcurrent Protection
• Multi-tiered Overvoltage Protection
- OVP Pin to Drive Optional Crowbar Device
• Selectable Operation Frequency up to 1.5MHz per Phase
• Digital Soft-Start
• Capable of Start-up in a Pre-Biased Load
• Pb-Free (RoHS compliant)
Applications
• High Current DDR/Chipset Core Voltage Regulators
• High Current, Low Voltage DC/DC Converters
• High Current, Low Voltage FPGA/ASIC DC/DC
Converters
FN9246 Rev 1.00
July 21, 2008
Page 1 of 28
ISL8103
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage, V
BOOT
. . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage, V
PHASE
. . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20µJ) to 24V (<200ns, V
BOOT-PHASE
= 12V)
Upper Gate Voltage, V
UGATE
. . . . V
PHASE
- 0.3V to V
BOOT
+ 0.3V
V
PHASE
- 3.5V (<100ns Pulse Width, 2µJ) to V
BOOT
+ 0.3V
Lower Gate Voltage, V
LGATE
. . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
QFN Package (Notes 1, 2) . . . . . . . . . .
32
3.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V
5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V
5%
Ambient Temperature (ISL8103CRZ) . . . . . . . . . . . . . 0°C to +70°C
Ambient Temperature (ISL8103IRZ) . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not
production tested.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Gate Drive Bias Current
VCC POR (Power-On Reset) Threshold
I
VCC
; ENLL = high
I
PVCC
; ENLL = high; all gate outputs open,
F
sw
= 250kHz
VCC Rising
VCC Falling
-
-
4.25
3.75
4.25
3.75
-
-
15
0.8
4.38
3.88
4.38
3.88
1.50
66.6
20
2.00
4.50
4.00
4.50
4.00
-
-
mA
mA
V
V
V
V
V
%
PVCC POR (Power-On Reset) Threshold
PVCC Rising
PVCC Falling
Oscillator Ramp Amplitude (Note 3)
Maximum Duty Cycle (Note 3)
CONTROL THRESHOLDS
ENLL Rising Threshold
ENLL Hysteresis
COMP Shutdown Threshold
REFERENCE AND DAC
System Accuracy (DAC = 0.6V, 0.9V)
System Accuracy (DAC = 1.2V, 1.50V)
DAC Input Low Voltage (REF0, REF1)
DAC Input High Voltage (REF0, REF1)
External Reference (Note 3)
OFS Sink Current Accuracy (Negative Offset)
OFS Source Current Accuracy (Positive Offset)
V
P-P
-
-
COMP Falling
0.1
0.66
100
0.25
-
-
0.4
V
mV
V
DROOP connected to IREF
DROOP connected to IREF
-0.8
-0.5
-
0.8
0.6
-
-
-
-
-
50.0
50.0
0.8
0.5
0.4
-
1.75
52.5
52.5
%
%
V
V
V
µA
µA
R
OFS
= 30kfrom OFS to VCC
R
OFS
= 10kfrom OFS to GND
47.5
47.5
FN9246 Rev 1.00
July 21, 2008
Page 5 of 28
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