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24FC256EMNY

Description
256K IC CMOS Serial EEPROM
File Size1MB,42 Pages
ManufacturerMicrochip
Websitehttps://www.microchip.com
Download Datasheet View All

24FC256EMNY Overview

256K IC CMOS Serial EEPROM

24AA256/24LC256/24FC256
256K I
2
C™ CMOS Serial EEPROM
Device Selection Table
Part
Number
24AA256
24LC256
24FC256
Note 1:
2:
V
CC
Range
1.7-5.5V
2.5-5.5V
1.7-5.5V
Max. Clock
Frequency
400 kHz
(1)
400 kHz
1 MHz
(2)
Temp.
Ranges
I, E
I, E
I
• Temperature Ranges:
- Industrial (I):
- Automotive (E):
-40C to +85C
-40C to +125C
Description:
The Microchip Technology Inc. 24AA256/24LC256/
24FC256 (24XX256*) is a 32K x 8 (256 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.7V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications or data acquisition.
This device also has a page write capability of up to 64
bytes of data. This device is capable of both random
and sequential reads up to the 256K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 2 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIC, TSSOP, MSOP, DFN and TDFN packages. The
24AA256 is also available in the 8-lead Chip Scale
package.
100 kHz for V
CC
< 2.5V.
400 kHz for V
CC
< 2.5V.
Features:
• Single Supply with Operation Down to 1.7V for
24AA256 and 24FC256 Devices, 2.5V for
24LC256 Devices
• Low-Power CMOS Technology:
- Active current 400 uA, typical
- Standby current 100 nA, typical
• 2-Wire Serial Interface, I
2
C
Compatible
• Cascadable up to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 5 ms Max.
• Self-Timed Erase/Write Cycle
• 64-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4000V
• More than One Million Erase/Write Cycles
• Data Retention >200 years
• Factory Programming Available
• Packages Include 8-lead PDIP, SOIC, DFN,
TDFN, TSSOP and MSOP
• Pb-Free and RoHS Compliant
Block Diagram
A0 A1A2 WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page Latches
I/O
SCL
YDEC
SDA
V
CC
V
SS
Sense Amp.
R/W Control
Package Types
PDIP/SOIC
A0
A1
A2
V
SS
1
24XX256
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0
A1
A2
V
SS
TSSOP/MSOP
(1)
1
24XX256
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
A0
A1
A2
V
SS
1
24XX256
2
3
4
DFN/TDFN
8 V
CC
7 WP
6 SCL
5 SDA
WP
6
CS (Chip Scale)
(2)
V
CC
A1 A0
1
4
7
2
5
8
3
A2
SDA SCL V
SS
(TOP DOWN VIEW,
BALLS NOT VISIBLE)
Note 1:
* Pins A0 and A1 are no connects for the MSOP package only.
Note 2:
Available in I-temp, “AA” only.
*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.
1998-2013 Microchip Technology Inc.
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