SiP41108
New Product
Vishay Siliconix
Half-Bridge N-Channel Programmable 1-A MOSFET Driver for
DC/DC Conversion with Adjustable High Side Propagation Delay
FEATURES
D
D
D
D
D
D
D
D
D
8-V or 12-V Low-Side Gate Drive
Undervoltage Lockout
Internal Bootstrap Diode
Adaptive Shoot-Through Protection
Synchronous MOSFET Disable
Shutdown Control
Adjustable High-Side Propagation Delay
Switching Frequency Up to 1 MHz
Drive MOSFETs In 5- to 48-V Systems
APPLICATIONS
D
D
D
D
D
D
Multi-Phase DC/DC Conversion
High Current Synchronous Buck Converters
High Frequency Synchronous Buck Converters
Asynchronous-to-Synchronous Adaptations
Mobile Computer DC/DC Converters
Desktop Computer DC/DC Converters
DESCRIPTION
SiP41108 is a high-speed half-bridge MOSFET driver with
adaptive shoot-through protection for use in high frequency,
high current, multiphase dc-to-dc synchronous rectifier buck
power supplies. It is designed to operate at switching
frequencies up to 1 MHz. The high-side driver is bootstrapped
to allow driving n-channel MOSFETs. SiP41108 comes with
adaptive shoot-through protection to prevent simultaneous
conduction of the external MOSFETs.
The high-side turn on delay is programmable via an external
capacitor. The 8-V regulator sets the high-side gate drive. The
low-side driver supply, PV
DD
, must be externally connected to
either V
DRV
or V
DD
for 8-V or 12-V gate drive respectively.
The SiP41108 is assembled in a lead (Pb)-free PowerPAKr
TSSOP-16 package and is specified to operate over the
industrial operating range of
−40°C
to 85°C.
FUNCTIONAL BLOCK DIAGRAM
+5 to 48 V
+12 V
V
DRV
PV
DD
V
DD
BOOT
OUT
H
SiP41108
PWM
Controller
SD
EN
SYNC
LX
V
OUT
DELAY
OUT
L
GND
GND
GND
8-V High-Side and 12-V Low−Side Gate Drive Configuration
Document Number: 73373
S-51104—Rev. B, 13-Jun-05
www.vishay.com
1
SiP41108
Vishay Siliconix
New Product
ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V)
V
DD
, PWM, EN
SYNC
, DELAY . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
to 15 V
LX, BOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3
to 55 V
BOOT to LX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−
0.3 to 15 V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
to 150_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C
Power Dissipation
a,b
TSSOP-16 PowerPAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.6 W
Thermal Impedance (Q
JA
)
a,b
TSSOP-16 PowerPAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 26.3 mW/_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V)
V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10.8 V to 13.2 V
V
LX
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 V
C
BOOT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 nF to 1
mF
V
BOOT−LX
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . .
−40
to 85_C
SPECIFICATIONS
a
Test Conditions Unless Specified
p
Parameter
Power Supplies
Supply Voltage
Quiescent Current
Supply Current
Shutdown Current
V
DD
I
DDQ
I
DD
I
SD
PWM Non-Switching
f
PWM
= 100 kHz C
LOAD
= 3 nF
kHz,
SD = 0 V, T
A
= 25_C
SD = 0 V
PV
DD
= V
DD
PV
DD
= V
DRV
10.8
5.0
11.5
10.0
0.1
0.8
1
5
mA
13.2
8.5
mA
V
Limits
Min
a
Typ
b
Max
a
Unit
Symbol
V
DD
= 12 V, V
BOOT
−
V
LX
= 8 V, T
A
=
−40
to 85_C
Reference Voltage
Break-Before-Make
V
BBM
2.5
V
PWM Input
Input High
Input Low
Bias Current
V
IH
V
IL
I
B
V
IH
V
IL
I
B
I
B
SD = V
DD
4.0
"0.3
4.0
V
DD
1.0
"1
V
mA
EN
SYNC
, SD Inputs
Input High
Input Low
Bias Current (EN
SYNC
)
Bias Current (SD)
V
DD
1.0
"1
15
V
mA
Bootstrap Diode
Forward Voltage
V
F
I
F
= 40 mA, T
A
= 25_C
0.7
0.85
1.0
V
MOSFET Drivers
High-Side Drive Current
I
PKH(source)
I
PKH(sink)
I
PKL(source)
Low-Side Drive Current
I
PKL(sink)
I
PKL(source)
I
PKL(sink)
www.vishay.com
V
BOOT
−
V
LX
= 8 V
V
DRV
= 8 V
V
DRV
= 12 V
P
VDD
= V
DRV
P
VDD
= V
DD
0.8
1.0
0.9
1.2
1.4
1.8
Document Number: 73373
S-51104—Rev. B, 13-Jun-05
A
2
SiP41108
New Product
SPECIFICATIONS
a
Test Conditions Unless Specified
Parameter
MOSFET Drivers
High-Side
High Side Driver Impedance
R
DH(source)
R
DH(sink)
R
DL(source)
Low-Side
Low Side Driver Impedance
R
DL(sink)
R
DL(source)
R
DL(sink)
High-Side Rise Time
High-Side Fall Time
High-Side Rise Time Bypass
High-Side Fall Time Bypass
High-Side
High Side Propagation Delay
t
d(off)H
t
d(on)H
t
rL
L
t
rH
t
fH
V
BOOT
−
V
LX
= 8 V LX = GND
V,
V
DRV
= 8 V
V
DRV
= 12 V
P
VDD
= V
DRV
P
VDD
= V
DD
2.3
1.9
2.9
1.3
2.4
1.2
45
35
45
35
20
30
P
VDD
= V
DRV
P
VDD
= V
DD
P
VDD
= V
DRV
P
VDD
= V
DD
65
65
30
30
15
20
ns
4.2
3.5
5.2
2.4
4.3
2.2
W
Vishay Siliconix
Limits
Min
a
Typ
b
Max
a
Unit
Symbol
V
DD
= 12 V, V
BOOT
−
V
LX
= 8 V, T
A
=
−40
to 85_C
10%
−
90% V
BOOT
−
V
LX
= 8 V C
LOAD
= 3 nF
90%,
10%
−
90% V
BOOT
−
V
LX
= 12 V C
LOAD
= 3 nF
90%,
See Timing Waveforms
10%
−
90%, V
BOOT
−
V
LX
= 8 V
C
LOAD
= 3 nF
10%
−
90%, V
BOOT
−
V
LX
= 12 V
C
LOAD
= 3 nF
10%
−
90%, V
BOOT
−
V
LX
= 8 V
C
LOAD
= 3 nF
10%
−
90%, V
BOOT
−
V
LX
= 12 V
C
LOAD
= 3 nF
See Timing Waveforms
Low-Side
Low Side Rise Time
Low-Side
Low Side Fall Time
t
fL
t
d(off)L
t
d(on)L
Low-Side
Low Side Propagation Delay
LX Timer
PHASE Falling Time−out
t
LX
380
ns
V
DRV
Regulator
Output Voltage
Output Current
Current Limit
Line Regulation
Load Regulation
V
DRV
I
DRV
I
LIM
LNR
LDR
V
DRV
= 0 V
V
CC
= 10.8 V to 13.2 V
5 mA to 80 mA
120
7.6
8
80
200
0.05
0.1
8.4
100
280
0.5
1.0
V
mA
%/V
%
V
DRV
Regulator UVLO
V
DRV
Rising
V
DRV
Falling
Hysteresis
V
UVLO2
Hyst
V
DRV
= V
DD
V
DRV
= V
DD
100
6.7
6.4
300
7.2
6.9
500
V
mV
High-Side Undervoltage Lockout
Threshold
V
UVHS
LX Falling
2.5
3.35
4.0
V
V
DD
Undervoltage Lockout
Threshold
Power on Reset Time
V
UVLO1
POR
5.0
5.3
2.5
5.6
V
ms
Thermal Shutdown
Temperature
Hysteresis
T
SD
T
H
Temperature Rising
Temperature Falling
165
25
_C
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (−40_ to 85_C).
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at V
DD
= 12 V unless otherwise noted.
Document Number: 73373
S-51104—Rev. B, 13-Jun-05
www.vishay.com
3
SiP41108
Vishay Siliconix
TIMING WAVEFORMS
PWM
50%
90%
10%
t
fH
90%
OUT
L
t
d(off)H
10%
90%
10%
t
d(on)H
10%
t
rH
50%
90%
New Product
OUT
H
t
rL
t
d(off)L
t
fL
LX
2.5 V
t
d(on)L
PIN CONFIGURATION AND TRUTH TABLE
TSSOP-16 PowerPAK
NC
OUT
H
BOOT
SD
PWM
DELAY
AGND
PGND
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
NC
LX
EN
SYNC
V
DRV
PV
DD
V
DD
OUT
L
NC
TRUTH TABLE
PWM
L
H
L
H
X
SD
H
H
H
H
L
EN
SYNC
L
L
H
H
X
OUT
H
L
H
L
H
L
OUT
L
L
L
H
L
L
ORDERING INFORMATION
Part Number
SiP41108DQP-T1−E3
Eval Kit
Marking
41108
SiP41108DB
Temperature Range
−40
to 85_C
Temperature Range
−40
to 85_C
PIN DESCRIPTION
Pin Number
1, 9, 16
2
3
4
5
6
7
8
10
11
12
13
14
15
www.vishay.com
Name
NC
OUT
H
BOOT
SD
PWM
DELAY
AGND
PGND
OUT
L
V
DD
PV
DD
V
DRV
EN
SYNC
LX
No Connection
8−V High-side MOSFET gate drive
Function
Bootstrap supply for high-side driver. A capacitor connects between BOOT and LX.
Shuts down the driver IC
Input signal for the MOSFET drivers
Connection for the highside delay adjustment capacitor.
Analog ground. Exposed pad is connected to AGND.
Power ground
Synchronous or low-side MOSFET gate drive
12-V supply. Connect a bypass capacitor
w1
mF
from here to ground.
Low side driver supply. Connect to V
DRV
for 8-V Gate Drive or to V
DD
for 12-V drive.
8-V Voltage Regulator Output. Connect a bypass capacitor
w1
mF
from here to ground
Enables OUT
L
, the driver for the synchronous MOSFET
Connection to source of high-side MOSFET, drain of the low-side MOSFET, and the inductor
Document Number: 73373
S-51104—Rev. B, 13-Jun-05
4
SiP41108
New Product
FUNCTIONAL BLOCK DIAGRAM
V
DRV
V
DD
+8-V Regulator
BOOT
Vishay Siliconix
SD
UVLO
OTP
UVLO
OUT
H
LX
Delay
DELAY
PWM
EN
SYNC
−
+
V
BBM
(2.5 V)
PV
DD
OUT
L
GND
PGND
PV
DD
Figure 1.
DETAILED OPERATION
PWM
The PWM pin controls the switching of the external MOSFETs.
The driver logic operates in a noninverting configuration. The
PWM input stage should be driven by a signal with fast
transition times, like those provided by a PWM controller or
logic gate, (<200 ns). The PWM input functions as a logic input
and is not intended for applications where a slow changing
input voltage is used to generate a switching output when the
input switching threshold voltage is reached. The PWM
amplitude is 5 V but can go up to V
DD.
Low-Side Driver
The supplies for the low-side driver are V
DD
and GND. During
shutdown, OUT
L
is held low.
High-Side Driver
The high-side driver is isolated from the substrate to create a
floating high-side driver so that an n-channel MOSFET can be
used for the high-side switch. The supplies for the high-side
driver are BOOT and LX. The voltage is supplied by a floating
bootstrap capacitor, which is continually recharged by the
switching action of the output. During shutdown OUT
H
is held
low.
Gate Drive Voltage (V
DRV
) Regulator
An integrated 80-mA, 8-V regulator supplies voltage to the
V
DRV
pin and it current limits at 200-mA typical when the output
of the regulator is shorted to ground. A capacitor (1
mF
minimum) must be connected to the V
DRV
pin to stabilize the
regulator output, and the voltage on V
DRV
is supplied to the
integrated bootstrap diode. V
DRV
is used to recharge the
bootstrap capacitor and can be used to power the low-side
driver. The V
DRV
can be externally connected to V
DD
to
bypass the 8-V regulator and allow 12-V high-side gate drive.
If V
DRV
is connected to V
DD
the system voltage should not
exceed 43 V.
Document Number: 73373
S-51104—Rev. B, 13-Jun-05
www.vishay.com
5
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