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IDT74ALVCHR16543PF8

Description
Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56
Categorylogic    logic   
File Size74KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
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IDT74ALVCHR16543PF8 Overview

Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56

IDT74ALVCHR16543PF8 Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology)
Parts packaging codeSSOP
package instructionTSSOP,
Contacts56
Reach Compliance Codeunknown
Other featuresWITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G56
JESD-609 codee0
length11.3 mm
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
Number of digits8
Number of functions2
Number of ports2
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE WITH SERIES RESISTOR
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)6.9 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.4 mm
Terminal locationDUAL
width4.4 mm

IDT74ALVCHR16543PF8 Preview

IDT74ALVCHR16543
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT REGIS-
TERED TRANSCEIVER WITH
3-STATE OUTPUTS
AND BUS-HOLD
FEATURES:
0.5 MICRON CMOS Technology
Typical t
SK(0)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.40mm pitch TVSOP package
– Extended commercial range of – 40°C to +85°C
– V
CC
= 3.3V ±0.3V, Normal Range
– V
CC
= 2.7V to 3.6V, Extended Range
– V
CC
= 2.5V ±0.2V
– CMOS power levels (0.4µW typ. static)
– Rail-to-Rail output swing for increased noise margin
Drive Features for ALVCHR16543:
– Balanced Output Drivers: ±12mA
– Low switching noise
IDT74ALVCHR16543
DESCRIPTION:
N
O
FO T
R
R E
N CO
EW M
M
D E
ES N
D
IG E
N D
S
APPLICATIONS:
3.3V High Speed Systems
3.3V and lower voltage computing systems
This 16-bit registered transceiver is built using advanced dual metal
CMOS technology. The ALVCHR16543 can be used as two 8-bit
transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or
LEBA) and output-enable (OEAB or OEBA) inputs are provided for each
register to permit independent control in either direction of data flow. The
A-to-B enable (CEAB) input must be low to enter data from A or to output
data from B. If CEAB is low and LEAB is low, the A-to-B latches are
transparent; a subsequent low-to-high transition of LEAB puts the A
latches in the storage mode. With CEAB and OEAB both low, the 3-state
B outputs are active and reflect the data present at the output of the A
latches. Data flow from B to A is similar, but requires using CEBA, LEBA,
and OEBA.
The ALVCHR16543 has series resistors in the device output struc-
ture which will significantly reduce line noise when used with light loads.
This driver has been designed to drive ±12mA at the designated
threshold levels.
The ALVCHR16543 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents
floating inputs and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1
OEBA
1
CEBA
1
LEBA
56
2
OEBA
29
54
55
1
2
C EBA
2
LEBA
31
30
1
OEAB
1
CEAB
1
LEAB
2
OEAB
2
CEAB
2
LEAB
28
3
2
26
27
1
A
1
5
C1
1D
52
2
A
1
15
C1
1D
1
B
1
42
2
B
1
C1
1D
C1
1D
TO SEVEN OTHER C HANN ELS
TO SEVEN OTH ER C HANN ELS
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
APRIL 1999
DSC-4946/-
IDT74ALVCHR16543
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ABSOLUTE MAXIMUM RATING
Symbol
V
TERM(2)
Description
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
I
>
V
CC
Continuous Clamp Current, V
O
< 0
Continuous Current through
each V
CC
or GND
(1)
Unit
V
V
°C
mA
mA
mA
mA
NEW16link
Max.
– 0.5 to + 4.6
– 0.5 to
V
CC
+ 0.5
– 65 to + 150
– 50 to + 50
± 50
– 50
±100
1
OEAB
1
LEAB
1
CEAB
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
OEBA
1
LEBA
1
CEBA
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
GND
1
A
1
1
A
2
GND
1
B
1
1
B
2
V
CC
1
A
3
1
A
4
1
A
5
V
CC
1
B
3
1
B
4
1
B
5
GND
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
GND
1
B
6
1
B
7
1
B
8
2
B
1
2
B
2
2
B
3
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
CAPACITANCE
(T
A
= +25
o
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
5
7
7
Max.
7
9
9
Unit
pF
pF
pF
NEW16link
GND
2
A
4
2
A
5
2
A
6
GND
2
B
4
2
B
5
2
B
6
NOTE:
1. As applicable to the device type.
V
CC
2
A
7
2
A
8
V
CC
2
B
7
2
B
8
PIN DESCRIPTION
Pin Names
xOEAB
xOEBA
xCEAB
xCEBA
xLEAB
xLEBA
xAx
xBx
Description
A-to-B Output Enable Inputs (Active LOW)
B-to-A Output Enable Inputs (Active LOW)
A-to-B Enable Inputs (Active LOW)
B-to-A Enable Inputs (Active LOW)
A-to-B Latch Enable Inputs (Active LOW)
B-to-A Latch Enable Inputs (Active LOW)
A-to-B Data Inputs or B-to-A 3-State Outputs
(1)
B-to-A Data Inputs or A-to-B 3-State Outputs
(1)
GND
2
CEAB
2
LEAB
2
OEAB
GND
2
CEBA
2
LEBA
2
OEBA
SSOP/
TSSOP/TVSOP
TOP VIEW
NOTE:
1. These pins have “Bus-Hold.” All other pins are standard inputs,
outputs, or I/Os.
c
2
IDT74ALVCHR16543
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
FUNCTION TABLE
(1,
Inputs
xCEAB
H
X
L
L
L
xLEAB
X
X
H
L
L
xOEAB
X
H
L
L
L
2)
Output
xAx
X
X
X
L
H
xBx
Z
Z
B
0
L
H
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
B
0
= Level of B before the indicated steady-state inputs were
established.
2. A-to-B data flow is shown; B-to-A flow is similar but uses xCEBA, xLEBA,
and xOEBA.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = – 40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input HIGH Current
Input LOW Current
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
One input at V
CC
0.6V,
other inputs at V
CC
or GND
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= V
CC
V
I
= GND
V
O
= V
CC
V
O
= GND
Min.
1.7
2
Typ.
(1)
– 0.7
100
0.1
Max.
0.7
0.8
±5
±5
± 10
± 10
– 1.2
40
µA
µA
V
mV
µA
µA
V
Unit
V
Quiescent Power Supply
Current Variation
750
µA
NEW16link
NOTE:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
3
IDT74ALVCHR16543
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
BUS-HOLD CHARACTERISTICS
Symbol
I
BHH
I
BHL
I
BHH
I
BHL
I
BHHO
I
BHLO
NOTES:
1. Pins with Bus-hold are identified in the pin description.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
NEW16link
Parameter
(1)
Bus-Hold Input Sustain Current
Bus-Hold Input Sustain Current
Bus-Hold Input Overdrive Current
V
CC
= 3.0V
V
CC
= 2.3V
V
CC
= 3.6V
Test Conditions
V
I
= 2.0V
V
I
= 0.8V
V
I
= 1.7V
V
I
= 0.7V
V
I
= 0 to 3.6V
Min.
– 75
75
– 45
45
Typ.
(2)
Max.
± 500
Unit
µA
µA
µA
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 4mA
I
OH
= – 6mA
V
CC
= 2.7V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
I
OH
= – 4mA
I
OH
= – 8mA
I
OH
= – 6mA
I
OH
= – 12mA
I
OL
= 0.1mA
I
OL
= 4mA
I
OL
= 6mA
I
OL
= 4mA
I
OL
= 8mA
I
OL
= 6mA
I
OL
= 12mA
Min.
V
CC
– 0.2
1.9
1.7
2.2
2
2.4
2
Max.
0.2
0.4
0.55
0.4
0.6
0.55
0.8
NEW16link
Unit
V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to + 85°C.
4
IDT74ALVCHR16543
3.3V CMOS 16-BIT REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, T
A
= 25
o
C
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance
Outputs enabled
Power Dissipation Capacitance
Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
V
CC
= 2.5V ± 0.2V
Typical
V
CC
= 3.3V ± 0.3V
Typical
Unit
pF
pF
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.5V ± 0.2V
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
SU
t
H
t
H
t
W
t
SK
(o)
Parameter
Propagation Delay
xAx to xBx or xBx to xAx
Propagation Delay
xLEAB to xBx or xLEBA to xAx
Output Enable Time
xCEAB to xBx or xCEBA to xAx
Output Disable Time
xCEAB, to xBx or xCEBA to xAx
Output Enable Time
xOEAB to xBx or xOEBA to xAx
Output Disable Time
xOEAB to xBx or xOEBA to xAx
Setup Time, data before CE↑
Setup Time, data before LE↑ or CE LOW
Hold Time, data after CE↑
Hold Time, data after LE↑, CE LOW
Pulse Duration, LE or CE LOW
Output Skew
(2)
Min
.
1
1.1
1
2
1
1.6
1.2
1.2
1.2
1.2
3.3
Max.
6.2
7.6
8.2
6.8
7.8
6.4
V
CC
= 2.7V
Min
.
1.5
1.5
0.8
0.8
3.3
Max.
5.5
6.9
7.6
6.7
7
5.3
V
CC
= 3.3V ± 0.3V
Min
.
1
1.1
1
1.5
1
1.1
1.2
1.2
1.2
1.2
3.3
Max.
4.9
5.6
6.2
5.6
5.9
5.1
500
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
NOTES:
1. See test circuits and waveforms. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
5

IDT74ALVCHR16543PF8 Related Products

IDT74ALVCHR16543PF8 IDT74ALVCHR16543PA8
Description Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56 Registered Bus Transceiver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, TSSOP-56
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SSOP TSSOP
package instruction TSSOP, TSSOP,
Contacts 56 56
Reach Compliance Code unknown unknown
Other features WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
series ALVC/VCX/A ALVC/VCX/A
JESD-30 code R-PDSO-G56 R-PDSO-G56
JESD-609 code e0 e0
length 11.3 mm 14 mm
Logic integrated circuit type REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
Number of digits 8 8
Number of functions 2 2
Number of ports 2 2
Number of terminals 56 56
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Output characteristics 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR
Output polarity TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd) 6.9 ns 6.9 ns
Certification status Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.1 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface TIN LEAD TIN LEAD
Terminal form GULL WING GULL WING
Terminal pitch 0.4 mm 0.5 mm
Terminal location DUAL DUAL
width 4.4 mm 6.1 mm
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