PM6341-RI datasheet, PDF - EEWORLD Datasheet

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PM6341-RI: DescriptionPCM Transceiver, 1-Func, CEPT PCM-30/E-1, CMOS, PQFP80, 14 X 14 MM, 2 MM HEIGHT, METRIC, PLASTIC, QFP-80; CategoryWireless rf/communication Telecom circuit; File Size2MB，272 Pages; ManufacturerPMC-Sierra Inc

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PM6341-RI Overview

PCM Transceiver, 1-Func, CEPT PCM-30/E-1, CMOS, PQFP80, 14 X 14 MM, 2 MM HEIGHT, METRIC, PLASTIC, QFP-80

PM6341-RI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	PMC-Sierra Inc
package instruction	14 X 14 MM, 2 MM HEIGHT, METRIC, PLASTIC, QFP-80
Reach Compliance Code	compliant
Carrier type	CEPT PCM-30/E-1
JESD-30 code	S-PQFP-G80
JESD-609 code	e0
length	14 mm
Humidity sensitivity level	3
Number of functions	1
Number of terminals	80
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP80,.7SQ
Package shape	SQUARE
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	2.35 mm
Maximum slew rate	95 mA
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Telecom integrated circuit types	PCM TRANSCEIVER
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	14 mm

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PM6341 E1XC

DATA SHEET

PMC-910419

ISSUE 8

E1 FRAMER/TRANSCEIVER

PM6341

E1XC

E1 FRAMER/TRANSCEIVER

DATA SHEET

ISSUE 8: JUNE 1998

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PM6341 E1XC

DATA SHEET

PMC-910419

ISSUE 8

E1 FRAMER/TRANSCEIVER

CONTENTS

FEATURES ............................................................................................... 1

APPLICATIONS ........................................................................................ 4

REFERENCES ......................................................................................... 5

APPLICATION EXAMPLES ...................................................................... 7

BLOCK DIAGRAM.................................................................................. 10

DESCRIPTION ....................................................................................... 11

PIN DIAGRAM ........................................................................................ 13

PIN DESCRIPTION ................................................................................ 15

FUNCTIONAL DESCRIPTION ............................................................... 40

9.1

9.2

1.3

1.4

DIGITAL RECEIVE INTERFACE (DRIF) ...................................... 40

ANALOG PULSE SLICER (RSLC) .............................................. 40

CLOCK AND DATA RECOVERY (CDRC) .................................... 42

FRAMER (FRMR) ........................................................................ 44

1.4.1 FRAME FIND .................................................................... 45

1.4.2 CRC FRAME FIND............................................................ 48

1.4.3 CRC CHECK AND AIS DETECTION ................................ 49

1.1.4 SIGNALLING FRAME FIND.............................................. 49

1.1.5 ALARM INTEGRATION..................................................... 50

1.5

1.6

1.7

1.8

PERFORMANCE MONITOR COUNTERS (PMON) .................... 51

HDLC RECEIVER (RFDL) ........................................................... 51

ELASTIC STORE (ELST) ............................................................ 52

SIGNALLING EXTRACTOR (SIGX)............................................. 52

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

PM6341 E1XC

DATA SHEET

PMC-910419

ISSUE 8

E1 FRAMER/TRANSCEIVER

1.9

1.10

1.11

1.12

1.13

1.14

1.15

1.16

1.17

1.18

BACKPLANE RECEIVE INTERFACE (BRIF) .............................. 53

TRANSMITTER (TRAN) .............................................................. 53

TRANSMIT PER-CHANNEL SERIAL CONTROLLER (TPSC) .... 54

HDLC TRANSMITTER (XFDL) .................................................... 54

DIGITAL JITTER ATTENUATOR (DJAT)....................................... 55

TIMING OPTIONS (TOPS) .......................................................... 59

DIGITAL DS-1 TRANSMIT INTERFACE (DTIF) ........................... 60

ANALOG PULSE GENERATOR (XPLS)...................................... 60

BACKPLANE TRANSMIT INTERFACE (BTIF) ............................ 62

MICROPROCESSOR INTERFACE (MPIF) ................................. 62

NORMAL MODE REGISTER DESCRIPTION........................................ 66

11.1

INTERNAL REGISTERS ............................................................. 67

1.1.1 REGISTERS 49-4FH: LATCHING PERFORMANCE DATA

........................................................................................ 177

TEST FEATURES DESCRIPTION ....................................................... 187

12.1

12.2

INTERNAL REGISTERS ........................................................... 190

TEST MODE 0 ........................................................................... 191

TIMING DIAGRAMS ............................................................................. 193

OPERATIONS....................................................................................... 198

14.1

14.2

14.3

CONFIGURING THE E1XC FROM RESET............................... 198

USING THE INTERNAL FDL TRANSMITTER ........................... 199

USING THE INTERNAL FDL RECEIVER.................................. 201

14.3.1 KEY USED ON SUBSEQUENT DIAGRAMS: ................. 205

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

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