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X40034S14I-AT1

Description
3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14, 0.150 INCH, SOIC-14
CategoryPower/power management    The power supply circuit   
File Size908KB,23 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric View All

X40034S14I-AT1 Overview

3-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14, 0.150 INCH, SOIC-14

X40034S14I-AT1 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
parentfamilyid1751359
MakerRenesas Electronics Corporation
Objectid1600838671
Parts packaging codeSOIC
package instructionSOIC-14
Contacts14
Reach Compliance Codenot_compliant
ECCN codeEAR99
compound_id1762060
Other featuresMANUAL RESET INPUT
Adjustable thresholdYES
Analog Integrated Circuits - Other TypesPOWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 codeR-PDSO-G14
JESD-609 codee0
length8.6614 mm
Humidity sensitivity level1
Number of channels3
Number of functions1
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)240
power supply3/5 V
Certification statusNot Qualified
Maximum seat height1.7272 mm
Maximum supply current (Isup)3 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9116 mm
X40030, X40031,
NO T R E C
OMMEND
ED
NO R E C
OMMEND FOR NEW DESIG
N
E D RE P L
contact o
ACE M E N S
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1 -8 8 8 -IN
TERSIL o ical Support Cen
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tersil.com r at
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X40034, X40035
DATASHEET
FN8114
Rev 2.00
August 25, 2008
Triple Voltage Monitor with Integrated CPU Supervisor
The X40030, X40031, X40034, X40035 combine power-on
reset control, watchdog timer, supply voltage supervision,
second and third voltage supervision, and manual reset, in one
package. This combination lowers system cost, reduces board
space requirements, and increases reliability.
Applying voltage to V
CC
activates the power-on reset circuit,
which holds RESET/RESET active for a period of time. This
allows the power supply and system oscillator to stabilize
before the processor can execute code.
Low VCC detection circuitry protects the user’s system from
low voltage conditions, resetting the system when VCC falls
below the minimum VTRIP1 point. RESET/RESET is active
until VCC returns to proper operating level and stabilizes. A
second and third voltage monitor circuit tracks the unregulated
supply to provide a power fail warning or monitors different
power supply voltage. Three common low voltage
combinations are available, however, Intersil’s unique circuits
allows the threshold for either voltage monitor to be
reprogrammed to meet specific system level requirements or to
fine-tune the threshold for applications requiring higher
precision.
Features
• Triple voltage detection and reset assertion
- Standard reset threshold settings; see Table 1 on
page 5.
- Adjust low voltage reset threshold voltages using
special programming sequence
- Reset signal valid to V
CC
= 1V
- Monitor three separate voltages
• Fault detection register
• Selectable power-on reset time-out (0.05s, 0.2s, 0.4s,
0.8s)
• Selectable watchdog timer interval (25ms, 200ms, 1.4s or
off)
• Debounced manual reset input
• Low power CMOS
- 25µA typical standby current, watchdog on
- 6µA typical standby current, watchdog off
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available in 14 Ld SOIC and 14 Ld TSSOP packages
• Monitor voltages: 5V to 0.9V
• Independent core voltage monitor
• Pb-free available (RoHS compliant)
Applications
• Communication equipment
- Routers, hubs, switches
- Disk arrays, network storage
• Industrial systems
- Process control
- Intelligent instrumentation
• Computer systems
- Computers
- Network servers
FN8114 Rev 2.00
August 25, 2008
Page 1 of 23
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