EEWORLDEEWORLDEEWORLD

Part Number

Search

H13A-80.00-12-3OT-10/10-TR

Description
Parallel - 3Rd Overtone Quartz Crystal, 80MHz Nom, LEAD FREE PACKAGE-2
CategoryPassive components    Crystal/resonator   
File Size60KB,1 Pages
ManufacturerRaltron
Websitehttp://www.raltron.com/
Environmental Compliance
Download Datasheet Parametric View All

H13A-80.00-12-3OT-10/10-TR Overview

Parallel - 3Rd Overtone Quartz Crystal, 80MHz Nom, LEAD FREE PACKAGE-2

H13A-80.00-12-3OT-10/10-TR Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerRaltron
Objectid1657300988
package instructionLEAD FREE PACKAGE-2
Reach Compliance Codeunknown
compound_id75324904
Other featuresTAPE AND REEL
Ageing5 PPM/YEAR
Crystal/Resonator TypePARALLEL - 3RD OVERTONE
Drive level1 µW
frequency stability0.001%
frequency tolerance10 ppm
load capacitance12 pF
Manufacturer's serial numberH13A
Installation featuresSURFACE MOUNT
Nominal operating frequency80 MHz
Maximum operating temperature60 °C
Minimum operating temperature-10 °C
physical sizeL7.0XB5.0XH1.1 (mm)/L0.276XB0.197XH0.043 (inch)
Series resistance65 Ω
surface mountYES
SURFACE MOUNT MICROPROCESSOR CRYSTAL
FEATURES
LEAD FREE
TIGHT TOLERANCE AND STABILITY TO ± 10 PPM
WIDE FREQUENCY RANGE
SPECIFICATIONS
FREQUENCY RANGE
MODE OF OSCILLATION
FREQUENCY TOLERANCE AT 25°C
FREQUENCY STABILITY OVER
TEMPERATURE
OPERATING TEMPERATURE RANGE
STORAGE TEMPERATURE RANGE
AGING
LOAD CAPACITANCE
EQUIVALENT SERIES RESISTANCE (ESR)
SHUNT CAPACITANCE
DRIVE LEVEL
REFLOW CONDITIONS
6.00 MHz TO 100.00 MHz
(6.00 TO 50.00 MHz) FUNDAMENTAL
(40.00 TO 100.00 MHz) THIRD OVERTONE
±50 PPM MAXIMUM (±10 PPM, ±30 PPM AVAILABLE)
±50 PPM MAXIMUM (±10 PPM, ±30 PPM AVAILABLE)
-10°C TO +60°C STANDARD
-30°C TO +85°C EXTENDED
-40°C TO +85°C
±5 PPM PER YEAR MAX.
12 pF TO 32 pF OR SERIES
SEE TABLE
7.0 pF MAXIMUM
1 µW TO 100 µW
260° C FOR 10 s MAX 2 REFLOWS MAX
SERIES H13A
FREQUENCY E SR (OHM ) FREQUE NCY E SR (OHM ) FRE QUE NCY ES R (OHM )
(FUND)
MAX
(FUND)
M AX
(3OT)
MAX
6.00
100
23.040
35
40.00
65
7.60
60
24.00
35
40.320
65
8.00
60
24.576
35
44.2368
65
10.00
60
27.00
35
52.416
65
12.288
60
28.00
35
56.448
65
14.31818
45
28.63636
35
66.667
65
14.7456
45
29.4912
35
70.00
65
15.00
45
32.00
35
80.00
65
15.360
45
36.00
35
90.00
65
16.00
35
40.00
35
92.00
65
16.9344
35
40.320
35
98.304
65
18.432
35
48.00
35
100.00
65
19.6608
35
49.152
35
20.00
35
50.00
35
SOLDER REFLOW PROFILE
OUTLINE DRAWING
Scale none Dimension in
mm
inch
CARRIER TAPE DIMENSIONS
PIN CONNECTION
1.55 ± .05 DIA
.06 ± .002 DIA
7.5 ± 0.1
.295 ± .004
2 ± 0.1
.079 ± .004
1.75 ± 0.1
.069 ± .004
.295 ± .004
7.5 ± 0.1
1.8 ± 0.1
.071 ± .004
MARKING
AREA
.197 ± .006
5.0 ± 0.15
4 ± 0.1
.16 ± .004
7.0 ± 0.15
.276 ± .006
4.5
.177
SOLDER PATTERN
2.2
.087
1.1 ± 0.2
.043 ± .008
8.0 ± 0.1
2.2
.087
.315 ± .004
4.1
.161
PACKAGING
255mm REEL DIAMETER
16mm TAPE WIDTH, 8mm PITCH
QUANTITY: 1000 PIECES PER REEL
PART NUMBERING SYSTEM
HOLDER TYPE
-
H13A
IN MHz
FREQUENCY
-
LOAD CAPACITANCE
12 TO 32 pF FOR PARALLEL
S FOR SERIES
-
MODE
F
FUNDAMENTAL
3OT THIRD OVERTONE
-
TOLERANCE / STABILITY
(PPM/PPM)
EXAMPLES: 1030, 3030
-
EXTENDED
TEMPERATURE
EXT
TAPE AND REEL
-
TR
EXAMPLE: H13A-24.576-18-T
Raltron Electronics Corporation 10651 NW 19th St. Miami, Florida 33172 U.S.A.
Tel: 305-593-6033 Fax: 305-594-3973 e-mail: sales@raltron.com Internet: http://www.raltron.com
2.4
.094
16 ± 0.3
.630 ± .012
2.0
.079
【GD32-colibri-F350RX】+USART to realize serial data communication
In GD32F350, there are 2 USART serial ports, USART0 and USART1. USART0 has more powerful functions, while USART1 only implements part of the functions of USART0. Each serial port can implement hardwar...
anger0925 GD32 MCU
FPGA Design and Application Books
Free book downloads available...
eeleader FPGA/CPLD
Moderator: NVIC_SystemReset() does not reset the system
I am using STM32F103ZET6 and need to perform a system reset. However, after calling the function NVIC_SystemReset();, the CPU is not reset. What could be the reason?...
zhang67766 stm32/stm8
A5 RTL8188EU Guide
[b]MY-SAMA5 Linux-3.18 RTL8188EU Development Guide[/b][color=rgb(37, 37, 37)][font=sans-serif][size=0.875em] [size=13.3px][align=center][b]Directory[/b][size=12.502px] [[color=rgb(11, 0, 128)][url=htt...
明远智睿Lan Linux and Android
[FPGA Tips] How to calculate the delay level?
wFPGA latency is usually 50 % due to routing and 50% due to logic.wDon't forget the clock-to-output time ( tco , output time ) and the clock-to-setup time ( tsu , setup time ) -The logic delay level w...
eeleader FPGA/CPLD
DSP external SDRAM cannot write data, thank you
The board model is TMS320VC5509, and the hardware emulator is XDS510. When doing external SDRAM expansion, data cannot be written. Please help me solve it, thank you. The error message is as follows: ...
WGCH19890113 DSP and ARM Processors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 367  629  617  2098  2008  8  13  43  41  6 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号