EEWORLDEEWORLDEEWORLD

Part Number

Search

531WA309M000DGR

Description
CMOS/TTL Output Clock Oscillator, 309MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531WA309M000DGR Overview

CMOS/TTL Output Clock Oscillator, 309MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531WA309M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency309 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage1.89 V
Minimum supply voltage1.71 V
Nominal supply voltage1.8 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
OPC and real-time database
Since the emergence of distributed control systems (DCS) in the 1970s and 20th century, the use of distributed control systems has been widely promoted in the field of industrial automatic control. [/...
dcsopc Industrial Control Electronics
Altera's TimeQuest input delay min and max values
Can the min and max values of Altera's TimeQuest's input delay be understood as the approximate time range for data to reach the FPGA from the previous-level chip through the PCB routing?...
eeleader FPGA/CPLD
Some thoughts after watching the movie -------Advent
[size=4] I just finished watching this movie and I’m writing about it while I’m still hot. [/size] [size=4] I watched a movie called Arrival with the help of EEworld. It’s not that sci-fi, and it’s no...
ywlzh Talking
Please teach me a peak detection circuit composed of an op amp
The circuit schematic is shown below: The input is a 400kHz half-sine wave signal, Vmax=5.8V, Vmin=-0.4V 1. Is LM393 used as a comparator here? I don't know how to analyze the diode. 2. The op amp at ...
yaoyong Discrete Device
EEWORLD University ---- Control system of 100 quantum bits
100-qubit control system : https://training.eeworld.com.cn/course/4867...
EE大学堂 Test/Measurement
I need help with the LCD low-level driver writing method, address 1/4 duty cycle. I don't know how to do it.
The main thing is thisIf I want to display a number, I needLCDCOM[5] = leddata5[5];LCDCOM[6] = leddata6[5];two addresses to display a numberIf I want it to increment from 0 to 9. How to do itThe addre...
一百年后的自己 51mcu

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 575  437  909  2147  2192  12  9  19  44  45 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号