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Data Sheet
FEATURES
Voltage feedback amplifier
Ideal for ADSL and ADSL2+ central office (CO) and
customer premises equipment (CPE) applications
Enables high current differential applications
Low power operation
Single- or dual-supply operation from 10 V (± 5 V)
up to 24 V (± 12 V)
5.5 mA total quiescent supply current for full power ADSL
and ADSL2+ CO applications
Adjustable supply current to minimize power
consumption
High output voltage and current drive
400 mA peak output drive current
44 V p-p differential output voltage
Low distortion
−70 dBc MTPR, 26 kHz to 1.1 MHz
−65 dBc MTPR, 1.1 MHz to 2.2 MHz
High speed: 260 V/μs differential slew rate
Low Power, High Output Current
Differential Amplifier
AD8390A
FUNCTIONAL BLOCK DIAGRAM
VCC
INP
AD8390A
OUTN
VCC
56kΩ
56kΩ
VCOM
VEE
INN
VEE
56kΩ
56kΩ
OUTP
07094-002
Figure 1.
APPLICATIONS
ADSL/ADSL2+ CO and CPE line drivers
xDSL line drivers
High current differential amplifiers
GENERAL DESCRIPTION
The AD8390A is a high output current, low power consumption
differential amplifier. It is particularly well suited for the central
office (CO) driver interface in digital subscriber line systems
such as ADSL and ADSL2+. In full bias operation, the driver
delivers 20.4 dBm output power into low resistance loads while
compensating for hybrid and transformer insertion losses and
back termination resistors.
The AD8390A is available in a thermally enhanced LFCSP
package (16-lead LFCSP). Significant control and flexibility
in bias current have been designed into the AD8390A.
Four power modes are selectable via two digital inputs, PD0 and
PD1, providing three levels of driver bias and one power-down
state. In addition, the I
ADJ
pin is available for fine quiescent
current trimming to tailor the performance of the AD8390A.
The low power consumption, high output current, high output
voltage swing, and robust thermal packaging enable the
AD8390A to be used as the central office line driver in ADSL,
ADSL2+, and proprietary xDSL systems, as well as in other high
current applications requiring a differential amplifier.
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2013 Analog Devices, Inc. All rights reserved.
AD8390A
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
Maximum Power Dissipation ..................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
Data Sheet
Test Circuits........................................................................................8
Theory of Operation .........................................................................9
Applications Information .............................................................. 10
Supplies, Grounding, and Layout ............................................. 10
VCOM Pin .................................................................................. 10
Power Management.................................................................... 10
ADSL and ADSL2+ Applications ............................................. 11
Lightning and AC Power Fault ................................................. 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
2/13—Revision B: Initial Version
Rev. B | Page 2 of 12
Data Sheet
SPECIFICATIONS
AD8390A
V
S
= ±12 V or V
S
= 24 V, R
L
= 100 Ω, G = 10, PD(1:0) = (1,1), I
ADJ
= NC, VCOM = NC (bypassed with 0.1 μF capacitor), T
A
= 25°C, unless
otherwise noted. Refer to the basic test circuit in Figure 14.
Table 1.
Parameter
DYNAMIC PERFORMANCE
−3 dB Small Signal Bandwidth
Large Signal Bandwidth
Peaking
Slew Rate
NOISE/DISTORTION PERFORMANCE
Multitone Power Ratio (26 kHz to 1.1 MHz)
Multitone Power Ratio (1.1 MHz to 2.2 MHz)
Voltage Noise (RTI)
INPUT CHARACTERISTICS
RTI Offset Voltage (V
OS,DM(RTI)
)
±Input Bias Current
Input Offset Current
Input Resistance
Input Capacitance
Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
Differential Output Voltage Swing
Output Balance Error
Linear Output Current
Output Impedance
Output Common-Mode Offset
POWER SUPPLY
Operating Range (Dual Supply)
Operating Range (Single Supply)
Total Quiescent Current, I
ADJ
= VEE
Conditions
V
OUT
= 0.2 V p-p, R
F
= 10 kΩ
V
OUT
= 4 V p-p
V
OUT
= 0.2 V p-p
V
OUT
= 4 V p-p
Z
LINE
= 100 Ω, P
LINE
= 20.4 dBm,
crest factor (CF) = 5.4
Z
LINE
= 100 Ω, P
LINE
= 20.4 dBm,
crest factor (CF) = 5.4
f = 10 kHz
V
INP
− V
INN
, VCOM = midsupply
V
INP
– V
INN
, VCOM = NC
–3.0
–3.0
–0.35
Min
38
35
Typ
45
38
0.1
260
–70
–65
5
±1.0
±1.0
–4.0
±0.05
400
2
69
44
60
400
0.1
±35
±35
+3.0
+3.0
–7.0
+0.35
Max
Unit
MHz
MHz
dB
V/µs
dBc
dBc
nV/√Hz
mV
mV
µA
µA
kΩ
pF
dB
V
dB
mA
Ω
mV
mV
V
V
mA
mA
mA
mA
mA
mA
mA
mA
dB
V
V
V
kΩ
V/V
(∆V
OS,DM(RTI)
)/(∆V
IN,CM
)
∆V
OUT
(∆V
OS,CM
)/∆V
OUT
R
L
= 10 Ω, f
C
= 100 kHz
f
C
= 2 MHz
(V
OUTP
+ V
OUTN
)/2, VCOM = midsupply
(V
OUTP
+ V
OUTN
)/2, VCOM = NC
58
42.8
44.6
–75
–75
±5
10
+75
+75
±12
24
6.5
5.0
3.5
1.0
11.0
8.0
5.0
1.0
0.8
Total Quiescent Current, I
ADJ
= NC
Power Supply Rejection Ratio (PSRR)
PD(1:0) = 0 (Low Logic State)
PD(1:0) = 1 (High Logic State)
VCOM
Input Voltage Range
Input Resistance
VCOM Accuracy
PD(1:0) = (1,1)
PD(1:0) = (1,0)
PD(1:0) = (0,1)
PD(1:0) = (0,0)
PD(1:0) = (1,1)
PD(1:0) = (1,0)
PD(1:0) = (0,1)
PD(1:0) = (0,0)
∆V
OS,DM
/∆V
S
, ∆V
S
= ±1 V, VCOM = midsupply
72
1.6
−11.0
5.5
4.0
2.6
0.56
10.0
6.7
3.8
0.67
94
+10.0
28
1.0
1.005
∆V
OUT,CM
/∆VCOM
0.995
Rev. B | Page 3 of 12
AD8390A
ABSOLUTE MAXIMUM RATINGS
3.5
Data Sheet
Table 2.
MAXIMUM POWER DISSIPATION (W)
T
J
= 150°C
Parameter
Supply Voltage (VCC − VEE)
VCOM
Package Power Dissipation
Maximum Junction Temperature (T
J MAX
)
Operating Temperature Range (T
A
)
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
Rating
26 V
VEE < VCOM < VCC
See Figure 2
150°C
–40°C to +85°C
–65°C to +150°C
300°C
3.0
2.5
2.0
1.5
1.0
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
0.5
–15
–5
5
15
25
35
45
55
65
75
85
AMBIENT TEMPERATURE (°C)
Figure 2. Maximum Power Dissipation vs. Temperature
THERMAL RESISTANCE
θ
JA
is specified in still air with exposed pad soldered to 4-layer
JEDEC test board. θ
JC
is specified at the exposed pad.
Table 3. Thermal Resistance
Package Type
16-Lead LFCSP (CP-16-4)
θ
JA
30.4
θ
JC
16
Unit
°C/W
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
S
) times the
quiescent current (I
S
). Assuming that the load R
L
is referenced
to midsupply, the total drive power is V
S
/2 × I
OUT
, part of which
is dissipated in the package and part in the load (V
OUT
× I
OUT
).
RMS output voltages should be considered. If R
L
is referenced to
VEE as in single-supply operation, the total power is V
S
× I
OUT
.
In single-supply operation with R
L
referenced to VEE, the worst
case is V
OUT
= V
S
/2.
Airflow increases heat dissipation, effectively reducing θ
JA
. In
addition, more copper in direct contact with the package leads
from PCB traces, through holes, ground, and power planes
reduces θ
JA
.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation for the AD8390A is
limited by its junction temperature on the die.
The maximum safe junction temperature of plastic encapsu-
lated devices, as determined by the glass transition temperature
of the plastic, is 150°C. Exceeding this limit temporarily may
cause a shift in the parametric performance due to a change in
the stresses exerted on the die by the package. Exceeding this
limit for an extended period can result in device failure.
Figure 2 shows the maximum safe power dissipation in
the package vs. the ambient temperature. θ
JA
values are
approximations.
ESD CAUTION
Rev. B | Page 4 of 12
07094-003
0
–25
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