PSD3XX Family
PSD3XX
ZPSD3XX
ZPSD3XXV
PSD3XXR ZPSD3XXR ZPSD3XXRV
Low Cost Microcontroller Peripherals
Table of Contents
1
2
3
4
5
6
7
8
9
10
Introduction ...........................................................................................................................................................1
Notation ................................................................................................................................................................2
Key Features ........................................................................................................................................................4
PSD3XX Family Feature Summary ......................................................................................................................5
Partial Listing of Microcontrollers Supported ........................................................................................................6
Applications ..........................................................................................................................................................6
ZPSD Background ................................................................................................................................................6
7.1
Integrated Power Management
TM
Operation .............................................................................................7
Operating Modes (MCU Configurations) ............................................................................................................10
Programmable Address Decoder (PAD).............................................................................................................12
I/O Port Functions ...............................................................................................................................................15
10.1 CSIOPORT Registers..............................................................................................................................15
10.2 Port A (PA0-PA7).....................................................................................................................................16
10.2.1 Port A (PA0-PA7) in Multiplexed Address/Data Mode................................................................16
10.2.2 Port A (PA0-PA7) in Non-Multiplexed Address/Data Mode ........................................................17
10.3 Port B (PB0-PB7).....................................................................................................................................18
10.3.1 Port B (PA0-PA7) in Multiplexed Address/Data Mode................................................................18
10.3.2 Port B (PA0-PA7) in Non-Multiplexed Address/Data Mode ........................................................19
10.4 Port C (PC0-PC2) ....................................................................................................................................20
10.5 ALE/AS Input Pin .....................................................................................................................................20
PSD Memory ......................................................................................................................................................21
11.1 EPROM....................................................................................................................................................21
11.2 SRAM (Optional)......................................................................................................................................21
11.3 Page Register (Optional) .........................................................................................................................21
11.4 Programming and Erasure.......................................................................................................................21
Control Signals ...................................................................................................................................................22
12.1 ALE or AS ................................................................................................................................................22
12.2 WR or R/W...............................................................................................................................................22
12.3 RD/E/DS (DS option not available on 3X1 devices) ................................................................................22
12.4 PSEN or PSEN ........................................................................................................................................22
12.5 A19/CSI ...................................................................................................................................................23
12.6 Reset Input ..............................................................................................................................................24
Program/Data Space and the 8031 ....................................................................................................................26
Systems Applications..........................................................................................................................................27
Security Mode .....................................................................................................................................................30
Power Management............................................................................................................................................30
16.1 CSI Input..................................................................................................................................................30
16.2 CMiser Bit ................................................................................................................................................30
16.3 Turbo Bit (ZPSD Only).............................................................................................................................31
16.4 Number of Product Terms in the PAD Logic............................................................................................31
16.5 Composite Frequency of the Input Signals to the PAD Logic..................................................................32
16.6 Loading on I/O Pins .................................................................................................................................33
Calculating Power ...............................................................................................................................................34
11
12
13
14
15
16
17
i
PSD3XX Family
PSD3XX
ZPSD3XX
ZPSD3XXV
PSD3XXR ZPSD3XXR ZPSD3XXRV
Low Cost Microcontroller Peripherals
Table of Contents
(cont.)
18
Specifications......................................................................................................................................................37
18.1 Absolute Maximum Ratings .....................................................................................................................37
18.2 Operating Range .....................................................................................................................................37
18.3 Recommended Operating Conditions......................................................................................................37
18.4 Pin Capacitance.......................................................................................................................................37
18.5 AC/DC Characteristics – PSD3XX/ZPSD3XX (All 5 V devices) ..............................................................38
18.6 AC/DC Characteristics – PSD3XXV (3 V devices only)...........................................................................39
18.7 Timing Parameters – PSD3XX/ZPSD3XX (All 5 V devices)....................................................................40
18.8 Timing Parameters – ZPSD3XXV (3 V devices only) ..............................................................................42
18.9 Timing Diagrams for PSD3XX Parts.......................................................................................................44
18.10 AC Testing ...............................................................................................................................................65
Pin Assignments .................................................................................................................................................66
Package Information ...........................................................................................................................................67
Package Drawings ..............................................................................................................................................68
PSD3XX Product Ordering Information ..............................................................................................................72
22.1 PSD3XX Selector Guide..........................................................................................................................72
22.2 Part Number Construction .......................................................................................................................73
22.3 Ordering Information................................................................................................................................73
Data Sheet Revision History ...............................................................................................................................80
WSI Worldwide Sales, Service and Technical Support ......................................................................................84
19
20
21
22
23
For additional information,
Call 800-TEAM-WSI (800-832-6974).
Fax: 510-657-8495
Web Site: waferscale.com
E-mail: info@waferscale.com
ii
Programmable Peripheral
PSD3XX Family
Field-Programmable Microcontroller Peripheral
1.0
Introduction
The low cost PSD3XX family integrates high-performance and user-configurable blocks of
EPROM, programmable logic, and optional SRAM into one part. The PSD3XX products
also provide a powerful microcontroller interface that eliminates the need for external
“glue logic”. The part’s integration, small form factor, low power consumption, and ease of
use make it the ideal part for interfacing to virtually any microcontroller.
The major functional blocks of the PSD3XX include:
•
Two programmable logic arrays
•
256Kb to 1 Mb of EPROM
•
Optional 16 Kb SRAM
•
Input latches
•
Programmable I/O ports
•
Page logic
•
Programmable security.
The PSD3XX family architecture (Figure 1) can efficiently interface with, and enhance,
almost any 8- or 16-bit microcontroller system. This solution provides microcontrollers the
following:
•
Chip-select logic, control logic, and latched address signals that are otherwise
implemented discretely
•
Port expansion (reconstructs lost microcontroller I/O)
•
Expanded microcontroller address space (up to 16 times)
•
An EPROM (with security) and optional SRAM
•
Compatible with 8031-type architectures that use separate Program and Data Space
•
Interface to shared external resources.
Return to Main Menu
1
Embedded System
京公网安备 11010802033920号
EEWORLD
