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W3EG72126S262AJD3S

Description
DDR DRAM Module, 128MX72, 0.75ns, CMOS, DIMM-184
Categorystorage    storage   
File Size264KB,15 Pages
ManufacturerWhite Electronic Designs Corporation
Websitehttp://www.wedc.com/
Download Datasheet Parametric View All

W3EG72126S262AJD3S Overview

DDR DRAM Module, 128MX72, 0.75ns, CMOS, DIMM-184

W3EG72126S262AJD3S Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerWhite Electronic Designs Corporation
package instructionDIMM,
Reach Compliance Codeunknown
access modeFOUR BANK PAGE BURST
Maximum access time0.75 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N184
memory density9663676416 bit
Memory IC TypeDDR DRAM MODULE
memory width72
Number of functions1
Number of ports1
Number of terminals184
word count134217728 words
character code128000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128MX72
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
self refreshYES
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
White Electronic
W3EG72126S-D3
-JD3
-AJD3
PRELIMINARY*
1GB-128Mx72 DDR SDRAM REGISTERED ECC w/PLL
FEATURES
Double-data-rate architecture
DDR200, DDR266 and DDR333:
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Power supply: V
CC
= 2.5V ± 0.20V
JEDEC standard 184 pin DIMM package
• Package height options:
JD3: 30.48mm (1.20") and
AJD3: 28.70mm (1.13")
• Consult factory for availability of lead-free
products.
DESCRIPTION
The W3EG72126S is a 128Mx72 Double Data Rate
SDRAM memory module based on 512Mb DDR SDRAM
components. The module consists of eighteen 128Mx4
DDR SDRAMs in 66 pin TSOP packages mounted on a
184 pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
OPERATING FREQUENCIES
DDR333 @CL=2.5
Clock Speed
CL-t
RCD
-t
RP
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2
133MHz
2-3-3
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
November 2004
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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