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UMH10N

Description
Transistor
CategoryDiscrete semiconductor    The transistor   
File Size142KB,1 Pages
ManufacturerJCET
Websitehttp://www.cj-elec.com/

Jiangsu Changdian Technology Co., Ltd. focuses on semiconductor packaging and testing business, providing customers at home and abroad with a full range of solutions such as chip testing, packaging design, packaging testing, etc. The company was successfully listed on the Shanghai Main Board in 2003, becoming the first semiconductor packaging and testing listed company in China. It now has a national enterprise technology center and a postdoctoral research workstation. It is a national key high-tech enterprise, a supporting unit of the National Engineering Laboratory for High-density Integrated Circuits, and the chairman unit of the Integrated Circuit Packaging Technology Innovation Strategic Alliance.

Discrete devices: diodes (switching diodes, Schottky diodes (Schottky rectifiers), voltage regulator diodes, Pin diodes, TVS diodes, rectifier diodes, fast recovery diodes); transistors (Darlington tubes, digital transistors, MOSFETs); thyristors: silicon-controlled rectifiers, triacs; composite tubes: transistors + field-effect tubes, dual transistors, dual digital transistors, digital transistors + transistors, transistors + diodes, field-effect tubes + diodes, dual field-effect tubes. Voltage regulator circuit; energy-saving lamp charger switch tube

Lead frame: TO series (TO); SOD series (SOD); SOT series (TSOT, SOT); FBP series (WBFBP); QFN series (QFNWB, DFNWB, DFNFC, QFNFC); ​​QFP series (LQFP: PQFP: PLCC: TQFP); SIP series (SIP, HSIP, FSIP); SOP series (SOP, HSOP, SSOP, MSOP, HTSOP, TSSOP); DIP series (DIP, FDIP, SDIP); PDFN series; PQFN series; MIS series (MISFC, MISWB)

Nine core technologies: Through Silicon Via (TSV) packaging technology; SiP RF packaging technology; wafer-level 3D rewiring packaging process technology; copper bump interconnection technology; high-density FC-BGA packaging and testing technology (Flip Chip BGA); multi-turn array four-sided pinless packaging and testing technology; package body 3D stacking technology; 50μm or less ultra-thin chip 3D stacking packaging technology; MEMS multi-chip packaging technology; MIS packaging technology (pre-encapsulated interconnection system); BGA packaging technology, etc.

 

 

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UMH10N Overview

Transistor

UMH10N Parametric

Parameter NameAttribute value
MakerJCET
package instruction,
Reach Compliance Codeunknown

UMH10N Preview

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JIANGSU CHANGJIANG ELECTRONICS TECHNOLOGY CO., LTD
SOT-363
UMH10N
Plastic-Encapsulate Diodes
SOT-363
General purpose transistors (dual transistors)
FEATURES
Two DTC123J chips in a package
Mounting possible with SOT-363 automatic mounting machines.
Transistor elements are independent, eliminating interference.
Mounting cost and area be cut in half.
Marking: H10
Equivalent circuit
1
Absolute maximum ratings(Ta=25℃)
Parameter
Supply voltage
Input voltage
Output current
Power dissipation
Junction temperature
Storage temperature
Symbol
V
CC
V
IN
I
O
I
C(MAX)
Pd
Tj
Tstg
Limits
50
-5~12
100
100
150
150
-55~150
Unit
V
V
mA
mW
Electrical characteristics (Ta=25℃)
Parameter
Input voltage
Output voltage
Input current
Output current
DC current gain
Input resistance
Resistance ratio
Transition frequency
Symbol
V
I(off)
V
I(on)
V
O(on)
I
I
I
O(off)
G
I
R
1
R
2
/R
1
f
T
80
1.54
17
2.2
21
250
2.86
26
MHz
KΩ
1.1
0.1
0.3
3.6
0.5
Min.
Typ
Max.
0.5
Unit
V
V
mA
μA
Conditions
V
CC
=5V, I
O
=100μA
V
O
=0.3V, I
O
=5mA
I
O
/I
I
=5mA/0.25mA
V
I
=5V
V
CC
=50V, V
I
=0
V
O
=5V, I
O
=10mA
-
-
V
CE
=10V, I
E
=5mA, f=100MHz
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