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MC54HC112JD

Description
J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16,
Categorylogic    logic   
File Size137KB,4 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

MC54HC112JD Overview

J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16,

MC54HC112JD Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerMotorola ( NXP )
package instructionDIP, DIP16,.3
Reach Compliance Codeunknown
seriesHC/UH
JESD-30 codeR-GDIP-T16
JESD-609 codee0
length19.3 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP16,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2/6 V
propagation delay (tpd)38 ns
Certification statusNot Qualified
Maximum seat height4.19 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeNEGATIVE EDGE
width7.62 mm
minfmax20 MHz

MC54HC112JD Related Products

MC54HC112JD MC74HC112ND
Description J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, CDIP16, HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Is it Rohs certified? incompatible incompatible
Maker Motorola ( NXP ) Motorola ( NXP )
package instruction DIP, DIP16,.3 DIP, DIP16,.3
Reach Compliance Code unknown unknown
series HC/UH HC/UH
JESD-30 code R-GDIP-T16 R-PDIP-T16
JESD-609 code e0 e0
length 19.3 mm 18.86 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type J-K FLIP-FLOP J-K FLIP-FLOP
Number of digits 2 2
Number of functions 2 2
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity COMPLEMENTARY COMPLEMENTARY
Package body material CERAMIC, GLASS-SEALED PLASTIC/EPOXY
encapsulated code DIP DIP
Encapsulate equivalent code DIP16,.3 DIP16,.3
Package shape RECTANGULAR RECTANGULAR
Package form IN-LINE IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 2/6 V 2/6 V
propagation delay (tpd) 38 ns 38 ns
Certification status Not Qualified Not Qualified
Maximum seat height 4.19 mm 4.69 mm
Maximum supply voltage (Vsup) 6 V 6 V
Minimum supply voltage (Vsup) 2 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount NO NO
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE THROUGH-HOLE
Terminal pitch 2.54 mm 2.54 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
Trigger type NEGATIVE EDGE NEGATIVE EDGE
width 7.62 mm 7.62 mm
minfmax 20 MHz 20 MHz
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