Single 16A fast acting fuses; located in the input “line”.
1.18kg
Conditions
Shutdown and auto-recovery, main output (BF
Airflow)
Shutdown and auto-recovery, main output (FB
Airflow)
Main 12V Output; latching
1
(12VSB maintains operation)
Latching1, <1ms
Latching
1
; percentage of full load, immediate shutdown
Latching
1
after 20sec
Latches
1
after 20ms
Latching
1
Both outputs
Hiccup for both outputs after 20sec
Hiccup for 12VSB after 15mS
Latching, <1ms
Min.
60
55
13.5
10
>160
99.6/159.6
116/186.2
13.3
4.0
4.5
10
Typ.
65
60
Max.
70
65
15.0
11
-
-
-
15.0
4.50
-
11
Units
°C
°C
Vdc
%
A
A
Vdc
A
Vdc
12VSB
Latch-off requires elimination of fault condition and then recycling either the AC input or PS_ON re-cycle or PMBus “Clear Faults” command to resume operation
Installed in End User system and contingent upon final system design
3
Radiated performance designed to meet Class A limits; however contingent on deployment; final qualification and certification testing to be performed by End User in system installation
STATUS INDICATORS AND CONTROL SIGNALS (BI_COLOUR LED)
STATUS INDICATORS AND CONTROL SIGNALS (BI-COLOUR LED)
Condition
Output ON and OK
No AC power to all power supplies
AC present / Only 12VSB on (PS off)
Sleep PS in Smart redundant state / Off line mode
Standby power failed, OCP, SC, OVP and UVP. Auto-recovery when the abnormal condition is removed.
12V Fault causing a shutdown; failure, (OCP,SC, OVP/UVP), OTP, Fan Fail, Input OVP
STATUS AND CONTROL SIGNALS
Signal Name
I/O
Description
This signal is an output to indicate input source power (AC and HVDC) is present and within operation limits.
It shall transition from logic level high to low within 2mS (signal valid only for power dropout of VIN)
LED Status (Power)
Solid GREEN
OFF
0.5Hz Blinking GREEN
2Hz Blinking GREEN
OFF
Solid AMBER
VIN_GOOD
Output
Interface Details
Pulled up via 1Kohm to an
internal 3.3V rail.
A logical level Low, 0-0.4Vdc;
Isink =4mA
A logical Level High, 2.4-3.46Vdc;
Isource =50uA
PWOK (Output
OK)
SMB_ALERT
(FAULT)
PRESENT_L
(Power Supply
Absent)
This signal should be asserted high by the power supply to indicate that all outputs are within the allowed regulation
limits.
Conversely, this signal should be de-asserted to a low state when any of the DC outputs voltage fall below their voltage
regulation limits, or when the incoming AC/HVDC source has been removed (i.e. longer than allowable by holdup).
This signal must be driven low at least 1ms before any of the outputs go out of regulation.
Output Additionally, the signal shall de-assert as a consequence of any occurrence of the following conditions:
•
Loss of the AC/HVDC Power Source
•
Fan Failure
•
Over Temperature (OTP)
In cases of output faults such as OVP/UVP/OCP, the signal shall be driven low immediately together with the output
shutdown.
This signal indicates that the power supply is experiencing an issue that the user should investigate; it shall be asserted
due to Critical or Warning events. The signal shall activate in the case of critical component temperature reaching a
warning threshold, AC/HVDC source loss, general failure(s) such as OCP/OVP/UVP or fan failure.
Output
This signal may also indicate the power supply is reaching its end of life or is operating in an environment exceeding the
specified limits.
This signal is to be asserted in parallel with the LED indicator turning solid Amber and associated Warning/Fault assertion.
This signal pin will be tied to VSTANDBY return through a 100 ohm resistor. The resistor shall not be damaged if
connected directly to a 3.3Vdc rail.
Output
It shall be a “Last Make, First Break” (LMFB) sequenced signal that indicates the “presence” of the installed power
module.
Pulled up internally via 1Kohm to
internal an 3.3Vdc rail
A logic high 2.4-3.46Vdc;
Isource =50uA
A logical level Low, 0-0.4Vdc;
Isink =4mA
Pulled up internally via 10kohm to
3.3Vdc
A logic high 2.4-3.46Vdc;
Isource =50uA
A logical level Low, 0-0.4Vdc;
Isink =4mA
100ohm to VSTANDBY Return
The resistor is rated to avoid
damage if connected directly to a
3.3Vdc rail.
https://www.murata-ps.com/support
D1U86T-W-1600-12-HBxC.A01.D02 Page 3 of 6
D1U86T-W-1600-12-HBxC Series
86mm 1U Front End AC-DC Power Supply
STATUS AND CONTROL SIGNALS
Signal Name
I/O Description
PSON
(Main Out In
Enable/Disable)
PS_KILL
In
Interface Details
Pulled up internally via 10Kohm to
The PS_ON signal is required to remotely turn on/off the power supply. PSON is an active low signal that turns on the Main
internal an 3.3Vdc rail
Output.
A logic high 2.0 - 3.46Vdc;
If this signal is not pulled low by the system, or left open, the Main output remains/turns off.
Isource =4mA
The power supply shall provide an internal pull-up. The power module also provides de-bounce circuitry for PSON to prevent it
A logical level Low, 0-1.0Vdc;
from oscillating On/Off at startup or when activated by a mechanical switch.
Isink =400µA
The DC main outputs, but not standby, will be disabled when the input is driven high than 2.64V or open circuit.
Pulled up via 10K to internal
The main outputs will be powered on or off based on PS_ON when PSKILL is low.
3.3VDC
Provisions for de-bounding will be included in the PS_KILL circuitry to prevent th
e power supply from oscillating O
n/
O
ff at
A logic low <0.8Vdc
startup or when activated by a mechanical switch..
A serial clock line compatible with PMBus
TM
Power Systems Management Protocol Part 1 – General Requirements Rev 1.2.
SCL
No additional internal capacitance is added that would affect the speed of the bus.
(Serial Clock) Both
The signal is provided with a series isolator device to disconnect the internal power supply bus in the event that the power
module is unpowered.
A serial data line compatible with PMBus
TM
Power Systems Management Protocol Part 1 – General Requirements Rev 1.2.
SDA
Both The signal is provided with a series isolator device to disconnect the internal power supply bus in the event that the power
(Serial Data)
module is unpowered.
V1_SENSE
&
In
V1SENSE_RTN
Pulled up via 5.9K to internal
3.3VDC
VIL is 0.8V maximum
VOL is 0.4V maximum
VIH is 2.1V minimum
Pulled up via 5.9K to internal
3.3VDC
VIL is 0.8V maximum
VOL is 0.4V maximum
VIH is 2.1V minimum
ISHARE
CR_BUS
A0 Address
Select
Analog input/output voltage sense lines to compensate for power path voltage drop. These low level analog signals should be
isolated from digital circuit noise.
Compensation for up to 0.2Vdc
When one or more remote sense lines are opened, regulation measured at the power supply output connector shall maintain the total connection drop (output and
specified regulation window within
±
200mVdc. If the REMOTE SENSE+ is shorted to DC_RETURN, the 12V Main output shall return connections).
enter protection and the power supply shall shut down.
This signal is connected between sharing units forming an ISHARE bus. It is a bi-directional analog bus voltage that controls the
Analogue voltage: +8V nominal;
current share between sharing units. A power module responds to changes in bus voltage but also can change the bus voltage
0.06V/A;
based on the load drawn from it. For single power module, the voltage on the ISHARE signal pin (bus) would read approximately
ISHARE sink = 0.5mA (at 4.00V)
Both
8Vdc at 100% load. For two identical units sharing the same 100% load this would read approximately 4Vdc for perfect current
ISHARE source = 4.0mA
(at 4.00V)
sharing (i.e. 50% module load capability per unit). This signal is also used by cold redundant enabled power supplies to
determine the on/off state of the Main output. Refer to
ACAN-xx
for details.
This signal shall be connected together at system board level to implement the cold redundant function.
In
See PMBusTM Communications protocol
ACAN-95 & 100
for detail concerning configuration of the cold redundancy feature set
A single analog input is provided for the host system to set the address of the internal slave devices (EEPROM and
microprocessor) for digital communications.
Pulled up internally via 10K to
Using this signal it is possible to provide two address combinations for different host system slots.
3.3Vdc
In
Address options:
A logic high = 2.4 to 3.57Vdc
A0 Setting:
Secondary Microprocessor
External EEPROM
A logic low = 0 to 0.4Vdc
LOW
0xB0
0XA0
HIGH
0xB2
0XA2
TIMING SPECIFICATIONS
Time Description
T1
Delay from 12VStandby regulation to 12Vdc output turn on.
T2
Main 12Vdc rise time
T2
12VStandby rise time
Delay from Main 12Vdc output within regulation to POK assertion at
T3
turn on
Delay from POK de-assertion to Main 54VDC dropping out of
T4
regulation
T5
Delay from Main 12VDC out of regulation to 12VSTANDBY turn off.
Min
5
2
2
Max
500
20
20
Unit
ms
ms
ms
Time
T6
T7
T8
T9
T11
T12
Description
Delay from loss of AC to PWOK de-assertion
Delay from application of AC on to Main 54VDC turn on
PS_ON negation (PSU off) to PWOK negation
PS_ON (PSU on) to output established
Delay from VIN drop out to VIN_GOOD negation & SMBAlert
assertion
Delay from VIN GOOD to PWOK
Min
10
Max
2000
2
350
2
Unit
ms
ms
ms
ms
ms
ms
100 500 ms
1
5
ms
ms
1
https://www.murata-ps.com/support
D1U86T-W-1600-12-HBxC.A01.D02 Page 4 of 6
D1U86T-W-1600-12-HBxC Series
86mm 1U Front End AC-DC Power Supply
OUTPUT CONNECTOR & SIGNAL INTERFACE PIN ASSIGNMENT
Pin
13-24
41-52
1-12
53-64
Pin
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin Name
PWR Return
12V Main Output
12V Output
Signal Name
Smart Redundant Bus Signal
Return Sense
VIN_GOOD
12V Load Share Bus
PSON
PS_KILL
No Connection
SMB_Alert
SDA
PRESENT
SCL
Signal Return
PWOK
A0
12VSTBY
+12V Remote Sense
Pin Type
I/O
Analogue Input
Output
Bi-Directional I/O
Input
Input
---
Output
Bi-Directional; I/O
Output
Bi-Directional; I/O
Signal GND
Output
Input
Aux/Standby Power
Input
STD
STD
STD
STD
STD
STD
Short
Short
Short
Short
Short
Short
Long
STD
STD
STD
STD
12V Main Output
Comments
Smart share for system efficiency performance; common bus to all sharing modules
Pin Type
Mating
Sequence
Long
12V Main and 12VSB Output return
Comments
12V main output Remote Sense Return
Indicate AC voltage is present and within operational limits.
12V Main Output Current Share Signal (analogue bus)
Active low; 12V main output on/off control
Turns power module on/off, short (MLBF) contact.
No End User Connection
Active low; I²C alert signal (interrupt)
I²C /SMBus/PMBus Data Line
Power Supply Present; passive signal to Signal Return
I²C /SMBus/PMBus Clock Line
Signal GND; (MFBL) long connection
Active high; indicates 12V Main is valid and within operational limits
PMBus address A0
12VSTANDBY output
12V Main output remote sense +VE lead; compensates for voltage drops to POL.
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