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K8D3216UTC-LI080

Description
Flash, 2MX16, 80ns, PBGA48, 6 X 8.50 MM, 0.80 MM PITCH, LEAD FREE, TBGA-48
Categorystorage    storage   
File Size1MB,44 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Environmental Compliance
Download Datasheet Parametric View All

K8D3216UTC-LI080 Overview

Flash, 2MX16, 80ns, PBGA48, 6 X 8.50 MM, 0.80 MM PITCH, LEAD FREE, TBGA-48

K8D3216UTC-LI080 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerSAMSUNG
Parts packaging codeBGA
package instruction6 X 8.50 MM, 0.80 MM PITCH, LEAD FREE, TBGA-48
Contacts48
Reach Compliance Codecompliant
ECCN code3A991.B.1.A
Maximum access time80 ns
Spare memory width8
startup blockTOP
command user interfaceYES
Universal Flash InterfaceYES
Data pollingYES
JESD-30 codeR-PBGA-B48
length8.5 mm
memory density33554432 bit
Memory IC TypeFLASH
memory width16
Humidity sensitivity level3
Number of functions1
Number of departments/size8,63
Number of terminals48
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX16
Package body materialPLASTIC/EPOXY
encapsulated codeVFBGA
Encapsulate equivalent codeBGA48,6X8,32
Package shapeRECTANGULAR
Package formGRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3/3.3 V
Programming voltage2.7 V
Certification statusNot Qualified
ready/busyYES
Maximum seat height1 mm
Department size8K,64K
Maximum standby current0.000018 A
Maximum slew rate0.05 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature40
switch bitYES
typeNOR TYPE
width6 mm
K8D3x16UTC / K8D3x16UBC
NOR FLASH MEMORY
Document Title
32M Bit (4M x8/2M x16) Dual Bank NOR Flash Memory
Revision History
Revision No. History
0.0
1.0
1.1
Initial Draft
Final Specification
Not support 48TSOP1 Package
Not support 16M/16M BANK partition
Support 48TSOP1 Package
Support 48TSOP1 Lead Free Package
Support 48FBGA Leaded/Lead Free Package
Complement status flag check algorithm
tCS timing is modified
"Asynchronous mode may not support read following four sequential
invalid read condition within 200ns." is added
Draft Date
June 18, 2002
November 13, 2002
Remark
Preliminary
November 18, 2003 Final
1.2
1.3
1.4
1.5
1.6
1.7
July 16, 2004
September 16,
2004
March 16, 2005
June 2, 2005
August 25,2006
September 7, 2006
1
Revision 1.7
September, 2006
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