TC514256APL-70 datasheet, PDF - EEWORLD Datasheet

TC514256APL-70: DescriptionIC 256K X 4 FAST PAGE DRAM, 70 ns, PDIP20, 0.300 INCH, PLASTIC, DIP-20, Dynamic RAM; Categorystorage storage; File Size84KB，1 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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TC514256APL-70 Overview

IC 256K X 4 FAST PAGE DRAM, 70 ns, PDIP20, 0.300 INCH, PLASTIC, DIP-20, Dynamic RAM

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Toshiba Semiconductor
Parts packaging code	DIP
package instruction	DIP,
Contacts	20
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	FAST PAGE
Maximum access time	70 ns
Other features	RAS ONLY; CAS BEFORE RAS; HIDDEN REFRESH
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
length	24.6 mm
memory density	1048576 bit
Memory IC Type	FAST PAGE DRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	20
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX4
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
refresh cycle	512
Maximum seat height	4.4 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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