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X24C02MIG-3

Description
EEPROM, 256X8, Serial, CMOS, PDSO8, ROHS COMPLIANT, MSOP-8
Categorystorage    storage   
File Size291KB,16 Pages
ManufacturerIC Microsystems Sdn Bhd
Environmental Compliance
Download Datasheet Parametric View All

X24C02MIG-3 Overview

EEPROM, 256X8, Serial, CMOS, PDSO8, ROHS COMPLIANT, MSOP-8

X24C02MIG-3 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerIC Microsystems Sdn Bhd
Parts packaging codeMSOP
package instructionTSSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)0.1 MHz
JESD-30 codeS-PDSO-G8
length3 mm
memory density2048 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count256 words
character code256
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256X8
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeSQUARE
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.07 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3 mm
Maximum write cycle time (tWC)10 ms
ICmic
TM
This X24C02 device has been acquired by
IC Microsystems Sdn Bhd from Xicor, Inc.
IC MICROSYSTEMS
2K
X24C02
Serial E PROM
2
256 x 8 Bit
FEATURES
DESCRIPTION
The X24C02 is CMOS a 2048 bit serial E PROM,
internally organized 256 x 8. The X24C02 features a serial
interface and software protocol allowing operation on a
simple two wire bus. Three address inputs allow up to eight
2
2.7V to 5.5V Power Supply
Low Power CMOS
—Active Current Less Than 1 mA
—Standby Current Less Than 50
A
Internally Organized 256 x 8
devices to share a common two wire bus.
Xicor E PROMs are designed and tested for applications
requiring extended endurance. Inherent data
retention is greater than 100 years. Available in DIP,
MSOP and SOIC packages.
2
Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
Four Byte Page Write Operation
—Minimizes Total Write Time Per Byte
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
New Hardwire—Write Control Function
FUNCTIONAL DIAGRAM
(8) V
CC
(4) V
SS
(7) WC
START CYCLE
(5) SDA
START
STOP
H.V. GENERATION
TIMING
& CONTROL
LOGIC
CONTROL
LOGIC
SLAVE ADDRESS
REGISTER
(6) SCL
(3) A2
(2) A1
(1) A0
+COMPARATOR
LOAD
INC
XDEC
E PROM
64 X 32
2
WORD
ADDRESS
COUNTER
R/W
YDEC
8
CK
PIN
DATA REGISTER
D
OUT
D
OUT
ACK
3838 FHD F01
© Xicor, 1991 Patents Pending
3838-1.2 7/30/96 T0/C3/D1 SH
1
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