Dat a She et, DS 1, M arc h 2001
Q-SMINT IX
2B1Q
Second
Gen.
Modular ISDN NT
(Intelligent
eXtended)
PEF 81912/81913 Version 1.3
®
W ir ed
Communica ti o ns
N e v e r
s t o p
t h i n k i n g .
Edition March 2001
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
©
Infineon Technologies AG 2001.
All Rights Reserved.
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Dat a She et, DS 1, M arc h 2001
Q-SMINT IX
2B1Q
Second
Gen.
Modular ISDN NT
(Intelligent
eXtended)
PEF 81912/81913 Version 1.3
®
W ir ed
Communica ti o ns
N e v e r
s t o p
t h i n k i n g .
PEF 81912/81913
Revision History:
Previous Version:
Page
All
March 2001
Preliminary Data Sheet 10.00
DS 1
Subjects (major changes since last revision)
Editorial changes, addition of notes for clarification etc.
Table 1,
Introduced new versions 81913 with extended performance of the U-interface
Chapter 1.3
Chapter
2.1.1.1
Chapter
2.3.2
Figure 12
Chapter
2.5.5.2
Chapter
2.5.5.3
Chapter
2.6.2.1
Chapter
2.6.3.1
Chapter 4
SCI: header description: added to sequences 43
H
, 41
H
and 49
H
: ’ Generally, it can
be used for any register access to the address range 00
H
-7D
H
.’
IOM-2 handler: removed ’U-transceiver (U)’ from listing of functional units with
programmable time slot and data port.
Figure ’Data Access via CDAx0 and CDAx1 register pairs’ corrected: input swap has
influence on the input enable (EN_I0,1), too
C/I commands: removed ’unconditional command’ from description C/I-command
’DR’
LT-S state machine: C/I=command AIL removed (no valid input to the LT-S state
machine)
HDLC: removed from description RBC: ’(bytes, which are ready for next read
access)’ and ’(blocks, which have been already read)’.
HDLC: Possible Error Conditions:
added behavioral description in case of an XPR interrupt
Detailed register description:
• U-transceiver Mode Evaluation Timing: clarified description
• register ID: reset value of version 1.3 is 01
H
(not 00
H
)
• RSTA.SA1,0: clarified note
• CIX1.CODX1: bits 5-0 of C/I-channel 1 (not 7-2)
• IOM_CR:TIC_DIS: added for clarification: ’This means that the timeslots TIC, A/
B, S/G and BAC are not available any more.’
Chapter 5.1
Absolute Maximum Ratings: Maximum Voltage on VDD: 4.2V (before: 4.6V)
Chapter 5.1
Refined references for ESD requirements:’ ...(CDM), EIA/JESD22-A114B (HBM) ---’
Chapter 5.2
Input/output leakage current set to 10µA (before: 1µA)
Table 43
U-transceiver characteristics: enhanced S/N+D for 81913 and threshold level for
81912 and 81913 distinguished
PEF 81912/81913
Revision History:
Previous Version:
Page
Chapter
5.6.2
Chapter
5.6.3
Chapter
5.6.3
Chapter
5.6.5
March 2001
Preliminary Data Sheet 10.00
DS 1
Subjects (major changes since last revision)
AC-Timing SCI/parallel µC interface: enhanced timing specifications
Added restriction for control interval t
RI
Parameters of the UVD/POR Circuit:
defined reduced range of hysteresis: min. 30mV/max. 90mV
relaxed upper limit of Detection Threshold to 2.92V (before: 2.9V)
defined max. rising VDD for power-on
Register summary U-transceiver 4B3T:
Reset value of MASKU is FF
H
(not 00
H
)
Chapter
7.2.5
Chapter 7.3
External circuitry for T-SMINT updated
For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com