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Datasheet> All Categories > Analog mixed-signal IC> The signal circuit> AD8361ART-REEL
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AD8361ART-REEL

Description
IC SPECIALTY ANALOG CIRCUIT, PDSO6, MO-178-AB, SOT-23, 6 PIN, Analog IC:Other
CategoryAnalog mixed-signal IC    The signal circuit   
File Size303KB，16 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric Compare View All

AD8361ART-REEL Overview

IC SPECIALTY ANALOG CIRCUIT, PDSO6, MO-178-AB, SOT-23, 6 PIN, Analog IC:Other

AD8361ART-REEL Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerADI
Parts packaging codeSOIC
package instructionLSSOP, TSOP6,.11,37
Contacts6
Reach Compliance Codenot_compliant
ECCN code5A991.B
Analog Integrated Circuits - Other TypesANALOG CIRCUIT
JESD-30 codeR-PDSO-G6
JESD-609 codee0
length2.9 mm
Humidity sensitivity level1
Number of functions1
Number of terminals6
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeLSSOP
Encapsulate equivalent codeTSOP6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)240
power supply3/5 V
Certification statusNot Qualified
Maximum seat height1.45 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyBIPOLAR
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.6 mm

AD8361ART-REEL Preview

a
FEATURES
Calibrated RMS Response
Excellent Temperature Stability
Up to 30 dB Input Range at 2.5 GHz
700 mV rms, 10 dBm re 50 Maximum Input
0.25 dB Linear Response Up to 2.5 GHz
Single Supply Operation: 2.7 V to 5.5 V
Low Power: 3.3 mW at 3 V Supply
Rapid Power-Down to Less than 1 A
APPLICATIONS
Measurement of CDMA, W-CDMA, QAM, Other
Complex Modulation Waveforms
RF Transmitter or Receiver Power Measurement
RFIN
2
LF to 2.5 GHz
TruPwr
™
Detector
AD8361
FUNCTIONAL BLOCK DIAGRAMS
micro_SOIC
VPOS
i
INTERNAL FILTER
FLTR
TRANS-
CONDUCTANCE
CELLS
2
AD8361
i
ERROR
AMP
7.5
BUFFER
ADD
OFFSET
SREF
COMM
IREF
VRMS
PWDN
BAND-GAP
REFERENCE
PRODUCT DESCRIPTION
The AD8361 is a mean-responding power detector for use in high-
frequency receiver and transmitter signal chains, up to 2.5 GHz.
It is very easy to apply. It requires only a single supply between
2.7 V and 5.5 V, power supply decoupling capacitor and an
input coupling capacitor in most applications. The output is a
linear-responding dc voltage with a conversion gain of 7.5 V/V rms.
An external filter capacitor can be added to increase the averag-
ing time constant.
3.0
2.8
2.6
2.4
2.2
2.0
V rms – Volts
SOT-23-6L
VPOS
RFIN
2
i
INTERNAL FILTER
FLTR
TRANS-
CONDUCTANCE
CELLS
2
AD8361
i
ERROR
AMP
7.5
BUFFER
VRMS
PWDN
SUPPLY
REFERENCE MODE
BAND-GAP
REFERENCE
COMM
INTERNAL
REFERENCE MODE
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
0.1
0.2
0.3
RFIN – V rms
0.4
0.5
GROUND
REFERENCE MODE
The AD8361 is intended for true power measurement of simple
and complex waveforms. The device is particularly useful for
measuring high crest-factor (high peak-to-rms ratio) signals, such
as CDMA and W-CDMA.
The AD8361 has three operating modes to accommodate a
variety of analog-to-digital converter requirements:
1. Ground referenced mode, in which the origin is zero;
2. Internal reference mode, which offsets the output 350 mV
above ground;
3. Supply reference mode, which offsets the output to V
S
/7.5.
The AD8361 is specified for operation from –40°C to +85°C and
is available in 8-lead micro_SOIC and 6-lead SOT packages.
It is fabricated on a proprietary high f
T
silicon bipolar process.
Figure 1. Output in the Three Reference Modes, Supply 3 V,
Frequency 1.9 GHz (SOT-23-6L Package Ground Reference
Mode Only)
TruPwr is a trademark of Analog Devices, Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD8361–SPECIFICATIONS
Parameter
SIGNAL INPUT INTERFACE
Frequency Range
1
Linear Response Upper Limit
Condition
(Input RFIN)
(T
A
= 25 C, V
S
= 3 V, f
RF
= 900 MHz, ground reference output mode, unless otherwise
noted.)
Min
Typ
Max
2.5
Unit
GHz
mV rms
dBm
mV rms
dBm
Ω
pF
V/V rms
V/V rms
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
V
mV
mV
mV
mV
mV
V
V
V
µs
µs
µA
V
mA
µA
µA
V
S
= 3 V
Equivalent dBm re 50
Ω
V
S
= 5 V
Equivalent dBm re 50
Ω
(Input RFIN to Output V rms)
Input Impedance
2
RMS CONVERSION
Conversion Gain
Dynamic Range
±
0.25 dB Error
4
±
1 dB Error
±
2 dB Error
Intercept-Induced Dynamic
Range Reduction
5, 6
Deviation from CW Response
390
4.9
660
9.4
225 1
7.5
f
RF
= 100 MHz, V
S
= 5 V
Error Referred to Best Fit Line
3
CW Input, –40°C < T
A
< +85°C
CW Input, –40°C < T
A
< +85°C
CW Input, –40°C < T
A
< +85°C
CW Input, V
S
= 5 V, –40°C < T
A
< +85°C
Internal Reference Mode
Supply Reference Mode, V
S
= 3.0 V
Supply Reference Mode, V
S
= 5.0 V
5.5 dB Peak-to-Average Ratio (IS95 Reverse Link)
12 dB Peak-to-Average Ratio (W-CDMA 4 Channels)
18 dB Peak-to-Average Ratio (W-CDMA 15 Channels)
Inferred from Best Fit Line
3
0 V at SREF, V
S
at IREF
f
RF
= 100 MHz, V
S
= 5 V
0 V at SREF, IREF Open
f
RF
= 100 MHz, V
S
= 5 V
0 V at IREF, 3 V at SREF
f
RF
= 100 MHz, V
S
= 5 V
0 V at IREF, V
S
at SREF
2.7
≤
V
S
≤
5.5 V, –40°C < T
A
< +85°C
2.7
≤
V
S
≤
5.5 V, –40°C < T
A
< +85°C
2 pF at FLTR Pin, 224 mV rms at RFIN
100 nF at FLTR Pin, 224 mV rms at RFIN
6.5
14
23
26
30
1
1
1.5
0.2
1.0
1.2
0
–50
350
300
400
590
V
S
/7.5
V
S
– 0.5
8.5
OUTPUT INTERCEPT
5
Ground Reference Mode (GRM)
Internal Reference Mode (IRM)
Supply Reference Mode (SRM)
+150
500
750
POWER-DOWN INTERFACE
PWDN HI Threshold
PWDN LO Threshold
Power-Up Response Time
PWDN Bias Current
POWER SUPPLIES
Operating Range
Quiescent Current
Power-Down Current
0.1
5
320
<1
2.7
1.1
<1
10
×
V
S
5.5
–40°C < T
A
< +85°C
0 mV rms at RFIN, PWDN Input LO
7
GRM or IRM, 0 mV rms at RFIN, PWDN Input HI
SRM, 0 mV rms at RFIN, PWDN Input HI
NOTES
1
Operation at arbitrarily low frequencies is possible; see Applications section.
2
Figure 13 and Figure 40 show impedance vs. frequency for the micro_SOIC and SOT respectively.
3
Calculated using linear regression.
4
Compensated for output reference temperature drift; see Applications section.
5
SOT-23-6L operates in ground reference mode only.
6
The available output swing, and hence the dynamic range, is altered by both supply voltage and reference mode; see Figures 35 and 36.
7
Supply current is input level dependant; see Figure 12.
Specifications subject to change without notice.
–2–
REV. A
AD8361
ABSOLUTE MAXIMUM RATINGS
1
PIN FUNCTION DESCRIPTIONS
Supply Voltage V
S
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
SREF, PWDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
S
IREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
S
– 0.3 V, V
S
RFIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 V rms
Equivalent Power re 50
Ω
. . . . . . . . . . . . . . . . . . . 13 dBm
Internal Power Dissipation
2
. . . . . . . . . . . . . . . . . . . . 200 mW
SOT-23-6L . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 mW
micro_SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 mW
Maximum Junction Temperature . . . . . . . . . . . . . . . . . 125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
Specification is for the device in free air.
SOT-23-6L:
θ
JA
= 230°C/W;
θ
JC
= 92°C/W.
micro_SOIC:
θ
JA
= 200°C/W;
θ
JC
= 44°C/W.
Pin
Micro SOT Name
1
2
6
VPOS
Description
3
5
4
4
PIN CONFIGURATIONS
micro_SOIC
VPOS 1
IREF 2
RFIN 3
PWDN 4
5
6
AD8361
8 SREF
7 VRMS
6 FLTR
5 COMM
2
3
7
1
SOT-23-6L
VRMS
1
6 VPOS
5 RFIN
4 PWDN
8
AD8361
COMM 2
FLTR
3
Supply Voltage Pin. Operational range
2.7 V to 5.5 V.
IREF
Output Reference Control Pin. Inter-
nal reference mode enabled when pin
is left open. Otherwise, this pin should
be tied to VPOS. DO NOT ground this
pin.
RFIN
Signal Input Pin. Must be driven from
an ac-coupled source. The low frequency
real input impedance is 225
Ω.
PWDN Power-Down Pin. For the device to
operate as a detector it needs a logical
low input (less than 100 mV). When
a logic high (greater than V
S
– 0.5 V)
is applied, the device is turned off and
the supply current goes to nearly zero
(ground and internal reference mode
less than 1
µA,
supply reference mode
V
S
divided by 100 kΩ).
COMM Device Ground Pin.
FLTR
By placing a capacitor between this pin
and VPOS, the corner frequency of the
modulation filter is lowered. The on-
chip filter is formed with 27 pF 2 kΩ
for small input signals.
VRMS Output Pin. Near-rail-to-rail voltage
output with limited current drive capa-
bilities. Expected load >10 kΩ to ground.
SREF
Supply Reference Control Pin. To en-
able supply reference mode this pin
must be connected to VPOS, other-
wise it should be connected to COMM
(ground).
ORDERING GUIDE
Model
AD8361ARM*
AD8361ARM-REEL
AD8361ARM-REEL7
AD8361ART-REEL
AD8361ART-REEL7
AD8361-EVAL
AD8361ART-EVAL
*Device
branded as J3A.
Temperature Range
–40°C to +85°C
Package Description
Tube, 8-Lead micro_SOIC
13" Tape and Reel
7" Tape and Reel
13" Tape and Reel
7" Tape and Reel
Evaluation Board micro_SOIC
Evaluation Board SOT-23-6L
Package Option
RM-8
RT-6
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD8361 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–
AD8361–Typical Performance Characteristics
2.8
2.6
2.4
2.2
2.0
OUTPUT – Volts
3.0
900MHz
2.5
2.0
100MHz
1900MHz
1.5
1.0
ERROR – dB
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
0
0.1
0.2
0.3
INPUT – V rms
0.4
0.5
2.5GHz
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0.01
0.02
(–21dBm)
0.1
(–7dBm)
INPUT – V rms
0.4
(+5dBm)
MEAN
3 SIGMA
Figure 2. Output vs. Input Level, Frequencies 100 MHz,
900 MHz, 1900 MHz, and 2500 MHz, Supply 2.7 V, Ground
Reference Mode, micro_SOIC
Figure 5. Error from Linear Reference vs. Input Level,
3 Sigma to Either Side of Mean, Sine Wave, Supply 3.0 V,
Frequency 900 MHz
5.5
5.0
4.5
4.0
OUTPUT – Volts
5.5V
3.0
2.5
2.0
5.0V
3.0V
1.5
1.0
ERROR – dB
2.7V
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
0.1
0.2
0.3
0.4
0.5
INPUT – V rms
0.6
0.7
0.8
0.5
0
–0.5
–1.0
MEAN
–1.5
–2.0
–2.5
–3.0
0.01
0.02
(–21dBm)
0.1
(–7dBm)
INPUT – V rms
0.6
(+8.6dBm)
3 SIGMA
Figure 3. Output vs. Input Level, Supply 2.7 V, 3.0 V, 5.0 V,
and 5.5 V, Frequency 900 MHz
Figure 6. Error from Linear Reference vs. Input Level,
3 Sigma to Either Side of Mean, Sine-Wave, Supply 5.0 V,
Frequency 900 MHz
3.0
2.5
2.0
1.5
IS95
REVERSE LINK
5.0
4.5
4.0
3.5
OUTPUT – Volts
IS95
REVERSE LINK
CW
1.0
ERROR – dB
CW
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
0.1
0.2
0.3
0.4
0.5
INPUT – V rms
0.6
0.7
0.8
WCDMA
4- AND 15-CHANNEL
0.5
0.0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0.01
0.02
0.1
0.2
INPUT – V rms
0.6
1.0
15-CHANNEL
4-CHANNEL
Figure 4. Output vs. Input Level with Different Waveforms
Sine Wave (CW), IS95 Reverse Link, W-CDMA 4-Channel
and W-CDMA 15-Channel, Supply 5.0 V
Figure 7. Error from CW Linear Reference vs. Input with
Different Waveforms Sine Wave (CW), IS95 Reverse Link,
W-CDMA 4-Channel and W-CDMA 15-Channel, Supply
3.0 V, Frequency 900 MHz
–4–
REV. A
AD8361
3.0
2.5
2.0
1.5
1.0
3.0
2.5
2.0
1.5
1.0
ERROR – dB
+85 C
ERROR – dB
0.5
0
–0.5
–1.0
MEAN
–1.5
–2.0
–2.5
–3.0
0.01
0.02
(–21dBm)
0.1
(–7dBm)
INPUT – V rms
0.4
(+5dBm)
3 SIGMA
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0.01
0.02
(–21dBm)
0.1
(–7dBm)
INPUT – V rms
0.4
(+5dBm)
–40 C
Figure 8. Error from CW Linear Reference vs. Input,
3 Sigma to Either Side of Mean, IS95 Reverse Link Signal,
Supply 3.0 V, Frequency 900 MHz
3.0
2.5
2.0
Figure 11. Output Delta from +25
°
C vs. Input Level,
3 Sigma to Either Side of Mean Sine Wave, Supply 3.0 V,
Frequency 1900 MHz, Temperature –40
°
C to +85
°
C
11
10
9
V
S
= 5V
INPUT OUT
OF RANGE
–40 C
V
S
= 3V
INPUT OUT
OF RANGE
+85 C
5
+25 C
4
3
2
1
0
–40 C
0
0.1
0.2
0.3
0.4
0.5
INPUT – V rms
0.6
0.7
0.8
+85 C
+25 C
SUPPLY CURRENT – mA
1.5
1.0
8
7
6
ERROR – dB
0.5
0
–0.5
–1.0
MEAN
–1.5
–2.0
–2.5
–3.0
0.01
0.02
(–21dBm)
0.1
(–7dBm)
INPUT – V rms
0.6
(+8.6dBm)
3 SIGMA
Figure 9. Error from CW Linear Reference vs. Input Level,
3 Sigma to Either Side of Mean, IS95 Reverse Link Signal,
Supply 5.0 V, Frequency 900 MHz
3.0
2.5
2.0
Figure 12. Supply Current vs. Input Level, Supplies 3.0 V,
and 5.0 V, Temperatures –40
°
C, +25
°
C, and +85
°
C
250
1.8
+25 C
+85 C
1.6
1.5
1.0
SHUNT RESISTANCE –
+85 C
–40 C
+85 C
150
1.4
1.2
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
0.01
0.02
(–21dBm)
0.1
(–7dBm)
INPUT – V rms
0.4
(+5dBm)
–40 C
100
+25 C
0.8
–40 C
50
0.6
0
0
500
1500
1000
FREQUENCY – MHz
2000
0.4
2500
Figure 10. Output Delta from +25
°
C vs. Input Level,
3 Sigma to Either Side of Mean Sine Wave, Supply 3.0 V,
Frequency 900 MHz, Temperature –40
°
C to +85
°
C
Figure 13. Input Impedance vs. Frequency, Supply 3 V,
Temperatures –40
°
C, +25
°
C, and +85
°
C, micro_SOIC (See
Applications for SOT-23-6L Data)
REV. A
–5–
SHUNT CAPACITANCE – pF
200
ERROR – dB
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AD8361ART-REEL Related Products

AD8361ART-REEL AD8361ARM-REEL
Description IC SPECIALTY ANALOG CIRCUIT, PDSO6, MO-178-AB, SOT-23, 6 PIN, Analog IC:Other SPECIALTY ANALOG CIRCUIT, PDSO8, MO-187-AA, MSOP-8
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker ADI ADI
Parts packaging code SOIC TSSOP
package instruction LSSOP, TSOP6,.11,37 MO-187-AA, MSOP-8
Contacts 6 8
Reach Compliance Code not_compliant not_compliant
ECCN code 5A991.B 5A991.B
Analog Integrated Circuits - Other Types ANALOG CIRCUIT ANALOG CIRCUIT
JESD-30 code R-PDSO-G6 S-PDSO-G8
JESD-609 code e0 e0
length 2.9 mm 3 mm
Humidity sensitivity level 1 1
Number of functions 1 1
Number of terminals 6 8
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LSSOP TSSOP
Package shape RECTANGULAR SQUARE
Package form SMALL OUTLINE, LOW PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 240 240
Certification status Not Qualified Not Qualified
Maximum seat height 1.45 mm 1.1 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3 V 3 V
surface mount YES YES
technology BIPOLAR BIPOLAR
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.95 mm 0.65 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 1.6 mm 3 mm

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