EEWORLDEEWORLDEEWORLD

Part Number

Search

FQD13N06_NL

Description
Power Field-Effect Transistor, 10A I(D), 60V, 0.14ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, LEAD FREE, DPAK-3
CategoryDiscrete semiconductor    The transistor   
File Size693KB,12 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Download Datasheet Parametric View All

FQD13N06_NL Overview

Power Field-Effect Transistor, 10A I(D), 60V, 0.14ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252, LEAD FREE, DPAK-3

FQD13N06_NL Parametric

Parameter NameAttribute value
MakerFairchild
Parts packaging codeTO-252
package instructionSMALL OUTLINE, R-PSSO-G2
Contacts3
Reach Compliance Codeunknown
ECCN codeEAR99
Avalanche Energy Efficiency Rating (Eas)85 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage60 V
Maximum drain current (ID)10 A
Maximum drain-source on-resistance0.14 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JEDEC-95 codeTO-252
JESD-30 codeR-PSSO-G2
Number of components1
Number of terminals2
Operating modeENHANCEMENT MODE
Maximum operating temperature150 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)40 A
Certification statusNot Qualified
surface mountYES
Terminal formGULL WING
Terminal locationSINGLE
transistor applicationsSWITCHING
Transistor component materialsSILICON
FQD13N06 / FQU13N06
May 2001
QFET
FQD13N06 / FQU13N06
60V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as DC/DC
converters, high efficiency switching for power
management in portable and battery operated products.
TM
Features
10A, 60V, R
DS(on)
= 0.14Ω @V
GS
= 10 V
Low gate charge ( typical 5.8 nC)
Low Crss ( typical 15 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
D
!
"
G
!
G
S
! "
"
"
D-PAK
FQD Series
I-PAK
G D S
FQU Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
FQD13N06 / FQU13N06
60
10
6.3
40
±
25
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25°C) *
Power Dissipation (T
C
= 25°C)
85
10
2.8
7.0
2.5
28
0.22
-55 to +150
300
T
J
, T
STG
T
L
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
θJC
R
θJA
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
4.5
50
110
Units
°C/W
°C/W
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2001 Fairchild Semiconductor Corporation
Rev. A1. May 2001
BSL initialization failed! Please advise
My program and software are all good. They work fine when plugged into other people's boards, but not my own. Later I found that some jumpers on my microcontroller were not properly connected. I searc...
yifan123 MCU
Application Tips
Application Tips...
lorant Embedded System
A magic pen that can speak——Perhaps a fun idea can add value to our design~
In the morning, Xiang Nong showed her little beauty a fun thing. Maybe most people in the technology forum are familiar with it, but this creativity at least aroused the child's strong interest in lea...
soso Creative Market
Differences between FPGA and CPLD
The difference between FPGA and CPLD, what are the issues?...
eeleader FPGA/CPLD
Playing games with 1000 microbits
[i=s]This post was last edited by dcexpert on 2017-7-9 09:56[/i] [img]http://www.micropython.org.cn/bbs/data/attachment/forum/201706/29/132113u8hfm5fs5zfmdkdv.jpg[/img] [font="][size=18px]A foreign ne...
dcexpert MicroPython Open Source section
MXCHIP+Open1081 routine test
...
yinyue01 RF/Wirelessly

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 936  2647  1195  236  929  19  54  25  5  20 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号