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FST16212MEA

Description
Bus Exchanger, CBT/FST/QS/5C/B Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, 0.300 INCH, MO-118, SSOP-56
Categorylogic    logic   
File Size176KB,5 Pages
ManufacturerRochester Electronics
Websitehttps://www.rocelec.com/
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FST16212MEA Overview

Bus Exchanger, CBT/FST/QS/5C/B Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, 0.300 INCH, MO-118, SSOP-56

FST16212MEA Parametric

Parameter NameAttribute value
MakerRochester Electronics
package instructionSSOP,
Reach Compliance Codeunknown
Other featuresTTL COMPATIBLE BUS SWITCH
seriesCBT/FST/QS/5C/B
JESD-30 codeR-PDSO-G56
length18.42 mm
Logic integrated circuit typeBUS EXCHANGER
Number of digits12
Number of functions1
Number of ports4
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
propagation delay (tpd)0.25 ns
Maximum seat height2.74 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4 V
Nominal supply voltage (Vsup)4.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
width7.5 mm
FST16212 24-Bit Bus Exchange Switch
July 1997
Revised April 2005
FST16212
24-Bit Bus Exchange Switch
General Description
The Fairchild Switch FST16212 provides 24-bits of high-
speed CMOS TTL-compatible bus switching or exchang-
ing. The low on resistance of the switch allows inputs to be
connected to outputs without adding propagation delay or
generating additional ground bounce noise.
The device operates as a 24-bit bus switch or a 12-bit bus
exchanger, which allows data exchange between the four
signal ports via the data-select terminals.
Features
s
4
:
switch connection between two ports.
s
Minimal propagation delay through the switch.
s
Low l
CC
.
s
Zero bounce in flow-through mode.
s
Control inputs compatible with TTL level.
Ordering Code:
Order Number
FST16212MEA
FST16212MTD
Package Number
MS56A
MTD56
Package Description
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagram
Truth Table
S2
L
L
L
L
H
H
H
H
S1
L
L
H
H
L
L
H
H
S0
L
H
L
H
L
H
L
H
A
1
Z
B
1
B
2
Z
Z
Z
B
1
B
2
A
2
Z
Z
Z
B
1
B
2
Z
B
2
B
1
A
1
A
1
Function
Disconnect
A
1
A
1
A
2
A
2
B
1
B
2
B
1
B
2
B
2
B
1
Pin Descriptions
Pin Name
S2, S1, S0
A
1
, A
2
B
1
, B
2
Description
Data-select inputs
Bus A
Bus B
Disconnect
B
1
, A
2
B
2
, A
2
© 2005 Fairchild Semiconductor Corporation
DS500038
www.fairchildsemi.com

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