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UPA2502TM

Description
Power Field-Effect Transistor, 13A I(D), 30V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HWSON, 8 PIN
CategoryDiscrete semiconductor    The transistor   
File Size178KB,7 Pages
ManufacturerNEC Electronics
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UPA2502TM Overview

Power Field-Effect Transistor, 13A I(D), 30V, 0.018ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HWSON, 8 PIN

UPA2502TM Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerNEC Electronics
package instructionHWSON, 8 PIN
Reach Compliance Codecompliant
Avalanche Energy Efficiency Rating (Eas)16.9 mJ
Shell connectionDRAIN
ConfigurationSINGLE WITH BUILT-IN DIODE
Minimum drain-source breakdown voltage30 V
Maximum drain current (ID)13 A
Maximum drain-source on-resistance0.018 Ω
FET technologyMETAL-OXIDE SEMICONDUCTOR
JESD-30 codeR-PDSO-F8
JESD-609 codee0
Number of components1
Number of terminals8
Operating modeENHANCEMENT MODE
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Polarity/channel typeN-CHANNEL
Maximum pulsed drain current (IDM)52 A
Certification statusNot Qualified
surface mountYES
Terminal surfaceTIN LEAD
Terminal formFLAT
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
transistor applicationsSWITCHING
Transistor component materialsSILICON
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ
PA2502
N-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
DESCRIPTION
The
µ
PA2502, which has a heat spreader, is N-channel
MOS Field Effect Transistor designed for DC/DC converter
and power management applications of notebook computers.
0.65 TYP.
PACKAGE DRAWING (Unit: mm)
µ
PA2502 has a thin surface mount package with a heat
spreader. The land size is same as 8-pin TSSOP.
Low on-state resistance
R
DS(on)1
= 12.0 mΩ MAX. (V
GS
= 10.0 V, I
D
= 7.0 A)
R
DS(on)2
= 18.0 mΩ MAX. (V
GS
= 4.5 V, I
D
= 7.0 A)
0.25
−0.05
0.10 M
FEATURES
1
2
3
4
+0.1
8
7
6
5
5.8
±0.1
6.4
±0.1
0.17
±0.05
0.8 MAX.
3.15
±0.15
3
±0.1
0.10 S
ORDERING INFORMATION
PART NUMBER
PACKAGE
8PIN HWSON
0.75
±0.15
4.15
±0.2
0.85
±0.15
2.2
±0.2
0
−0
+0.05
Low C
iss
: 760 pF TYP. (V
DS
= 10.0 V, V
GS
= 0 V)
1, 2, 3 : Source
4
: Gate
5, 6, 7, 8: Drain
µ
PA2502TM
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC)
Note1
Note2
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T
T
ch
T
stg
30.0
±20.0
±13.0
±52.0
2.7
150
−55
to +150
13.0
16.9
V
V
A
A
W
°C
°C
A
mJ
Gate
Protection
Diode
Source
Gate
Drain Current (pulse)
EQUIVALENT CIRCUIT
Drain
Total Power Dissipation
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note3
Note3
I
AS
E
AS
2
Body
Diode
Notes 1.
Mounted on FR-4 board of 25 cm x 1.6 mm, PW
10 sec
2.
PW
10
µ
s, Duty Cycle
1%
3.
Starting T
ch
= 25°C, V
DD
= 15.0 V, R
G
= 25
Ω,
V
GS
= 20.0
0 V
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16681EJ1V0DS00 (1st edition)
Date Published September 2004 NS CP(K)
Printed in Japan
2004

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