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LC
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MOS Quad 8-Bit DAC
with Separate Reference Inputs
AD7225
FEATURES
Four 8-bit DACs with output amplifiers
Separate reference input for each DAC
Microprocessor compatible with double-buffered inputs
Simultaneous update of all 4 outputs
Operates with single or dual supplies
Extended temperature range operation
No user trims required
Skinny 24-lead PDIP, CERDIP, SOIC, and SSOP packages
28-lead PLCC package
FUNCTIONAL BLOCK DIAGRAM
V
REF
A V
REF
B V
REF
C V
REF
D
V
DD
INPUT
LATCH A
DAC
LATCH A
DAC A
A
V
OUT
A
DATA BUS
DB7
DATA
(8-BIT)
DB0
INPUT
LATCH B
DAC
LATCH B
DAC B
B
V
OUT
B
INPUT
LATCH C
DAC
LATCH C
DAC C
C
V
OUT
C
INPUT
LATCH D
WR
A1
A2
DAC
LATCH D
DAC D
D
V
OUT
D
CONTROL
LOGIC
AD7225
00986-001
LDAC
V
SS
AGND DGND
Figure 1.
GENERAL DESCRIPTION
The AD7225 contains four 8-bit voltage output digital-to-
analog converters, with output buffer amplifiers and interface
logic on a single monolithic chip. Each DAC has a separate
reference input terminal. No external trims are required to
achieve full specified performance for the part.
The double-buffered interface logic consists of two 8-bit
registers per channel—an input register and a DAC register.
Control Input A0 and Control Input A1 determine which input
register is loaded when WR goes low. Only the data held in the
DAC registers determines the analog outputs of the converters.
The double-buffering allows simultaneous update of all four
outputs under control of LDAC. All logic inputs are TTL and
CMOS (5 V) level compatible, and the control logic is speed
compatible with most 8-bit microprocessors.
Specified performance is guaranteed for input reference
voltages from 2 V to 12.5 V when using dual supplies. The part
is also specified for single-supply operation using a reference of
10 V. Each output buffer amplifier is capable of developing 10 V
across a 2 kΩ load.
The AD7225 is fabricated on an all ion-implanted, high speed,
linear-compatible CMOS (LC
2
MOS) process, which is
specifically developed to integrate high speed digital logic
circuits and precision analog circuitry on the same chip.
PRODUCT HIGHLIGHTS
1.
DACs and Amplifiers on CMOS Chip.
The single-chip design of four 8-bit DACs and amplifiers
allows a dramatic reduction in board space requirements
and offers increased reliability in systems using multiple
converters. Its pinout is aimed at optimizing board layout
with all analog inputs and outputs at one end of the
package and all digital inputs at the other.
Single- or Dual-Supply Operation.
The voltage-mode configuration of the AD7225 allows
single-supply operation. The part can also be operated with
dual supplies, giving enhanced performance for some
parameters.
Versatile Interface Logic.
The AD7225 has a common 8-bit data bus with individual
DAC latches, providing a versatile control architecture for
simple interface to microprocessors. The double-buffered
interface allows simultaneous update of the four outputs.
Separate Reference Input for Each DAC.
The AD7225 offers great flexibility in dealing with input
signals, with a separate reference input provided for each
DAC and each reference having variable input voltage
capability.
2.
3.
4.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
AD7225
TABLE OF CONTENTS
Features .............................................................................................. 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Single Supply ................................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Terminology ...................................................................................... 8
Circuit Information .......................................................................... 9
Digital-to-Analog Section ........................................................... 9
Op Amp Section ........................................................................... 9
Digital Inputs Section ...................................................................9
Interface Logic Information .......................................................... 10
Ground Management and Layout ................................................ 11
Specification Ranges ...................................................................... 12
Unipolar Output Operation .......................................................... 13
Bipolar Output Operation ............................................................. 14
AGND Bias ...................................................................................... 15
AC Reference Signal ....................................................................... 16
Applications Information .............................................................. 17
Programmable Transversal Filter ............................................. 17
Digital Word Multiplication ..................................................... 18
Microprocesser Interface ............................................................... 19
V
SS
Generation ................................................................................ 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 23
REVISION HISTORY
3/10—Rev. B to Rev. C
Updated Format .................................................................. Universal
Deleted 28-Terminal Leadless Ceramic Chip Carrier
Package ................................................................................. Universal
Added 24-Lead SSOP Package .......................................... Universal
Changes to Features Section............................................................ 1
Changes to Table 1 ............................................................................ 3
Changes to Table 2 ............................................................................ 4
Changes to Table 3 ............................................................................ 5
Changes to Pin Configurations and Function Descriptions
Section ................................................................................................ 6
Added Table 4; Renumbered Sequentially .................................... 6
Changes to Specification Ranges section .................................... 12
Changes to Programmable Transversal Filter Section and
Figure 21 .......................................................................................... 17
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 23
Rev. C | Page 2 of 24
AD7225
SPECIFICATIONS
V
DD
= 11.4 V to 16.5 V, V
SS
= −5 V ± 10%; AGND = DGND = 0 V; V
REF
x = +2 V to (V
DD
− 4 V)
1
, unless otherwise noted. All specifications
T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
Resolution
Total Unadjusted Error
Relative Accuracy
Differential Nonlinearity
Full-Scale Error
Full-Scale Temperature Coefficient
Zero Code Error
Zero Code Error Temperature Coefficient
REFERENCE INPUT
Voltage Range
Input Resistance
Input Capacitance
3
Channel-to-Channel Isolation
3
AC Feedthrough
3
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current
Input Capacitance
3
Input Coding
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
3
Voltage Output Settling Time
3
Digital Feedthrough
3
Digital Crosstalk
3
Minimum Load Resistance
POWER SUPPLIES
V
DD
Range
I
DD
I
SS
SWITCHING CHARACTERISTICS
3, 4
t
1
t
2
t
3
t
4
t
5
t
6
1
2
K, B
Versions
2
8
±2
±1
±1
±1
±5
±30
±30
2 to (V
DD
− 4)
11
50
60
−70
2.4
0.8
±1
8
Binary
2.5
4
50
50
2
11.4/16.5
10
9
50
0
0
50
0
50
L, C
Versions
2
8
±1
±1/2
±1
±1/2
±5
±20
±30
2 to (V
DD
− 4)
11
50
60
−70
2.4
0.8
±1
8
Binary
2.5
4
50
50
2
11.4/16.5
10
9
50
0
0
50
0
50
Unit
Bits
LSB max
LSB max
LSB max
LSB max
ppm/°C typ
mV max
μV/°C typ
V min to V max
kΩ min
pF max
dB min
dB max
V min
V max
μA max
pF max
Conditions/Comments
V
DD
= 15 V ± 5%, V
REF
= 10 V
Guaranteed monotonic
V
DD
= 14 V to 16.5 V, V
REF
= 10 V
Occurs when each DAC is loaded with all 1s
V
REF
= 10 V p-p sine wave at 10 kHz
V
REF
= 10 V p-p sine wave at 10 kHz
V
IN
= 0 V or V
DD
V/μs min
μs max
nV sec typ
nV sec typ
kΩ min
V min to V max
mA max
mA max
ns min
ns min
ns min
ns min
ns min
ns min
V
REF
= 10 V; settling time to ±½ LSB
Code transition all 0s to all 1s
Code transition all 0s to all 1s
V
OUT
= 10 V
For specified performance
Outputs unloaded; V
IN
= V
INL
or V
INH
Outputs unloaded; V
IN
= V
INL
or V
INH
Write pulse width
Address to write setup time
Address to write hold time
Data valid to write setup time
Data valid to write hold time
Load DAC pulse width
Maximum possible reference voltage.
Temperature range is as follows for all versions: −40°C to +85°C.
3
Sample tested at 25°C to ensure compliance.
4
Switching characteristics apply for single-supply and dual-supply operation.
Rev. C | Page 3 of 24
AD7225
SINGLE SUPPLY
V
DD
= 15 V ± 5%; V
SS
= AGND = DGND = 0 V; V
REF
x = 10 V, unless otherwise noted. All specifications T
MIN
to T
MAX
,
unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE
Resolution
Total Unadjusted Error
2
Differential Nonlinearity
2
REFERENCE INPUT
Voltage Range
Input Resistance
Input Capacitance
3
Channel-to-Channel Isolation
2, 3
AC Feedthrough
2, 3
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Leakage Current
Input Capacitance
3
Input Coding
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
3
Voltage Output Settling Time
3
Digital Feedthrough
2, 3
Digital Crosstalk
2, 3
Minimum Load Resistance
POWER SUPPLIES
V
DD
Range
I
DD
SWITCHING CHARACTERISTICS
3
t
1
t
2
t
3
t
4
t
5
t
6
1
2
K, B Versions
1
8
±2
±1
2 to (V
DD
− 4)
11
50
60
−70
2.4
0.8
±1
8
Binary
2
4
10
10
2
14.25/15.75
10
50
0
0
50
0
50
L, C Versions
1
8
±1
±1
2 to (V
DD
− 4)
11
50
60
−70
2.4
0.8
±1
8
Binary
2
4
10
10
2
14.25/15.75
10
50
0
0
50
0
50
Unit
Bits
LSB max
LSB max
V min to V max
kΩ min
pF max
dB min
dB max
V min
V max
μA max
pF max
Conditions/Comments
Guaranteed monotonic
Occurs when each DAC is loaded with all 1s
V
REF
= 10 V p-p sine wave at 10 kHz
V
REF
= 10 V p-p sine wave at 10 kHz
V
IN
= 0 V or V
DD
V/μs min
μs max
nV sec typ
nV sec typ
kΩ min
V min to V max
mA max
ns min
ns min
ns min
ns min
ns min
ns min
Code transition all 0s to all 1s
Code transition all 0s to all 1s
V
OUT
= 10 V
For specified performance
Outputs unloaded; V
IN
= V
INL
or V
INH
Write pulse width
Address to write setup time
Address to write hold time
Data valid to write setup time
Data valid to write hold time
Load DAC pulse width
Temperature range is as follows for all versions: −40°C to +85°C.
Sample tested at 25°C to ensure compliance.
3
Switching characteristics apply for single-supply and dual-supply operation.
Rev. C | Page 4 of 24
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