PC7400MGU400LK datasheet, PDF - EEWORLD Datasheet

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PC7400MGU400LK: DescriptionRISC Microprocessor, 400MHz, CMOS, CBGA360, 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360; CategoryThe embedded processor and controller Microcontrollers and processors; File Size194KB，2 Pages; ManufacturerAtmel (Microchip)

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PC7400MGU400LK Overview

RISC Microprocessor, 400MHz, CMOS, CBGA360, 25 X 25 MM, 3.20 MM HEIGHT, 1.27 MM PITCH, CERAMIC, BGA-360

PC7400MGU400LK Parametric

Parameter Name	Attribute value
Maker	Atmel (Microchip)
Parts packaging code	BGA
package instruction	BGA,
Contacts	360
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Address bus width	32
boundary scan	YES
maximum clock frequency	100 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-CBGA-B360
length	25 mm
low power mode	YES
Number of terminals	360
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
Maximum seat height	3.2 mm
speed	400 MHz
Maximum supply voltage	1.9 V
Minimum supply voltage	1.7 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	25 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

PC7400MGU400LK Preview

PC7400FS - Rev.2 – 03/02

PC7400 PowerPC™ Microprocessor

Fact Sheet

The PC7400 PowerPC microprocessor is a high-performance, low-power, 32-bit implementation of the PowerPC Reduced

Instruction Set Computer (RISC) architecture combined with a full 128-bit implementation of Motorola’s AltiVec

technology instruction set, creating a high-performance RISC microprocessor ideal for leading-edge computing, control, and

signal processing functions. The MPC7400 supports the high-bandwidth MPX bus with minimized signal setup times and

reduced idle cycles to increase maximum operating frequency to over 100 MHz, increased address bus bandwidth, increased

data bus bandwidth, and more enhancements. To maintain backward compatibility for existing applications, thePC7400 also

supports the 60x bus protocol. MPC7400 microprocessors offer single-cycle double-precession floating-point performance,

provide full symmetric multiprocessing, (SMP) capabilities, and support up to 2MB of backside L2 cache. While the PC7400

is software-compatible with existing applications for PowerPC 603e

, PowerPC 740

, and PowerPC750

microprocessors, to utilize the full potential of this AltiVec technology-enabled device, some instruction changes in existing

source code are required to interface with the vector execution unit.

AltiVec Technology

AltiVec Technology expands the capabilities of PowerPC microprocessors by providing leading-edge, general-purpose

processing performance while concurrently addressing high-bandwidth data processing and algorithmic-intensive

computations in a single-chip solution. AltiVec technology:

Meets the computational demands of networking infrastructure such as multichannel modems, echo cancellation equipment,

and basestation processing.

Enables faster, more secure encryption methods optimized for the SIMD processing model

Provides compelling performance for multimedia-oriented desktop computers, desktop publishing, and digital video

processing.

Enables real-time processing of the most demanding data streams (MPEG-2 encode, continuous speech recognition, real-time

thigh-resolution 3D graphics, etc…)

PC7400 Main Features

Seven independent execution units :

Two integer units

Double precision floating-point unit

Vector unit (AltiVec

)

Load/store unit

System unit

Branch processing unit

Completion

Unit

Dispatch

Unit

Branch

Unit

Integer

Unit

Integer

Reg File

Floating Point

Unit

Floating Point

Reg File

AltiVec Unit

AltiVec Reg File

Cache and MMU support :

- 32-Kbytes physically -addressed instruction and data

caches

- 8 way set-associative

- Dedicated L2 cache interface with on-chip L2 tags

- Separate memory management units (MMU) for

instructions and data

- Virtual memory support up to 4 Petabytes (2

)

- Real memory support up to 4 Gigabytes (2

)

- 128 - entry instruction and data TLBs

32-bit address

Load/Store Unit

D MMU

Data Cache

I MMU

Inst. Cache

tags

Bus Interface Unit

64-bit data

60x / MPX Bus

64-bit

L2-Cache Port

L2 Data Bus

CPU Summary

Bus Interface

Compatible with 60x processor interface

Support the MPX bus architecture

32-bit address bus

64- bit data bus

12 Bus-to-Core frequency multiplier

Selectable interface voltages of 1.8 V or 3.3 V

PC7400

350-400 MHz

2.9 = K

350 MHz

400 MHz

3x, 3.5x, 4x, 4.5x, 5x, 5.5x, 6x, 6.5x,

7x, 7.5x, 8x, 9x

32-bit address, 64-bit data

3 (2+Branch)

32-KB Instruction and Data

512KB, 1MB, 2MB

1:1, 1.5:1, 2:1, 2.5:1, 3:1, 3.5:1, 4:1

5.0W/11.5W @ 400 MHZ

83 mm²

360-pin Flip-Chip CBGA

360-pin Flip-Chip CI-CGA

0.18 µ CMOS, 5LM

1.8/2.5/3.3V I/O

1.8V internal

22.8 @ 500 MHz

17.0 @ 500 MHz

917 MIPS @ 500 MHs

Active

Now

Integer (2)

Floating Point Unit

Vector Unit

Branch Unit

Load/Store Unit

System Register

Die Revision

CPU Speeds – Internal

CPU Bus Dividers

Bus Interface

Instructions per Clock

L1 Cache

L2 Cache

Core-to-L2 Frequency Divisions

Typ/Max Power Dissipation

Die Size

Package

Process

Voltage

SPECint95 (estimated)

SPECfp95 (estimated)

Other Performance

Status

Samples

Production

Power Management

Selectable 1.8 V interface voltage in output buffers

3 static power saving modes : doze, nap and sleep

Dynamic power management on decode

Full symmetric multiprocessing (MERSI) capability

Integrated thermal management unit

Packaging

- 360 pin CBGA & CI-CGA

Screening

- CBGA upscreening based upon Atmel -Grenoble standards

- Full military temperature range (Tj = -55°C + 125°C)

- Industrial temperature range (Tj = -40°C + 110°C)

Execution Units

Prefix

Prototype

Type

(X)

7400

400

Revision level

Rev K

Bus divider

(to be confirmed)

L: Any valid PLL configuration

Temperature range : Tj

M: -55, +125°C

V: -40, +110°C

Package:

G : CBGA

GS : CI-CGA

Max internal processor speed

Screening level:

U: Upscreening Test

350 MHz

400 MHz

For additional information and product availability:

contact your local ATMEL-Grenoble representative

or visit our web site at http://www.atmel.com

You may also contact the PowerPC technical hotline at std.hotline@gfo.atmel.com

The PowerPC and PowerPC603e names and the PowerPC logotype are trademarks of

International Business Machines Corporation, used under license therefrom.

BP123 - 38521 Saint-Egrève Cedex - France - Tel: +33 (0)4 76 58 30 00 - Fax: +33 (0)4 76 58 34 80

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