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FMS6502 8-Input, 6-Output Video Switch Matrix with Output Drivers, Input Clamp, and Bias Circuitry
January 2007
FMS6502
8-Input, 6-Output Video Switch Matrix with Output Drivers,
Input Clamp, and Bias Circuitry
Features
■
8 x 6 Crosspoint Switch Matrix
■
Supports SD, PS, and HD 1080i / 1080p Video
■
Input Clamp and Bias Circuitry
■
Doubly Terminated 75Ω Cable Drivers
■
Programmable 0dB or 6dB Gain
■
AC- or DC-Coupled Inputs
■
AC- or DC-Coupled Outputs
■
One-to-One or One-to-Many Input-to-Output
Description
The FMS6502 provides eight inputs that can be routed to
any of six outputs. Each input can be routed to one or
more outputs, but only one input may be routed to any
output.
Each input supports an integrated clamp option to set the
output sync tip level of video with sync to ~300mV. Alter-
natively, the input may be internally biased to center out-
put signals without sync (Chroma, Pb, Pr) at ~1.25V.
All outputs are designed to drive a 150Ω DC-coupled
load. Each output can be programmed to provide either
0dB or 6dB of signal gain.
Input-to-output routing and input bias mode functions are
controlled via an I
2
C-compatible digital interface.
Switching
■
I
2
C
TM
-Compatible Digital Interface, Standard Mode
■
3.3V or 5V Single Supply Operation
■
Pb-Free TSSOP-24 Package
Applications
■
Cable and Satellite Set-Top Boxes
■
TV and HDTV Sets
■
A / V Switchers
■
Personal Video Recorders (PVR)
■
Security and Surveillance
■
Video Distribution
■
Automotive (In-Cabin Entertainment)
Block Diagram
IN1
C/B
IN2
C/B
IN8
C/B
SDA
SCL
ADDR0
ADDR1
VCC (2)
GND (4)
OUT1
OUT2
OUT6
Figure 1. Block Diagram
Ordering Information
Part Number
FMS6502MTC24
FMS6502MTC24X
Pb-Free
Yes
Yes
Operating
Temperature Range
-40°C to 85°C
-40°C to 85°C
Package
24-Lead Thin Shrink Small
Ouline Package
24-Lead Thin Shrink Small
Ouline Package
Packing Method
Rail
Reel
© 2006 Fairchild Semiconductor Corporation
Rev. 1.0.0
www.fairchildsemi.com
FMS6502 8-Input, 6-Output Video Switch Matrix with Output Drivers, Input Clamp, and Bias Circuitry
Pin Configuration
Pin Description
Pin#
1
2
3
22
IN1
GND
IN2
VDD
IN3
GND
IN4
ADDR1
IN5
ADDR0
IN6
SCL
1
2
24
23
GND
OUT1
OUT2
OUT3
VDD
OUT4
OUT5
OUT6
GND
IN8
SDA
IN7
Pin
IN1
GND
IN2
VDD
IN3
GND
IN4
ADDR1
IN5
ADDR0
IN6
SCL
IN7
SDA
IN8
GND
OUT6
OUT5
OUT4
VDD
OUT3
OUT2
OUT1
GND
Type
Input
Output
Input
Input
Input
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
Input
Output
Output
Output
Output
Description
Input, channel 1
Must be tied to ground
Input, channel 2
Positive power supply
Input, channel 3
Must be tied to ground
Input, channel 4
Selects I
2
C address
Input, channel 5
Selects I
2
C address
Input, channel 6
Serial clock for I
2
C port
Input, channel 7
Serial data for I
2
C port
Input, channel 8
Must be tied to ground
Output, channel 6
Output, channel 5
Output, channel 4
Positive power supply
Output, channel 3
Output, channel 2
Output, channel 1
Must be tied to ground
FAIRCHILD
3
FMS6502
4
21
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
24L TSSOP
5
6
7
8
9
10
11
12
20
19
18
17
16
15
14
13
Figure 2. Pin Configuration
© 2006 Fairchild Semiconductor Corporation
FMS6502 Rev. 1.0.0
www.fairchildsemi.com
2
FMS6502 8-Input, 6-Output Video Switch Matrix with Output Drivers, Input Clamp, and Bias Circuitry
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-
ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-
tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Parameter
DC Supply Voltage
Analog and Digital I/O
Output Current Any One Channel, Do Not Exceed
Min.
-0.3
-0.3
Max.
6
V
cc
+ 0.3
40
Unit
V
V
mA
Reliability Information
Symbol
T
J
T
STG
T
L
Θ
JA
Junction Temperature
Storage Temperature Range
Lead Temperature (Soldering, 10s)
Thermal Resistance, JEDEC Standard Multi-Layer Test Boards,
Still Air
84
-65
Parameter
Min.
Typ.
Max.
150
150
300
Unit
°C
°C
°C
°C/W
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
T
A
V
CC
Supply Voltage Range
Parameter
Operating Temperature Range
Min.
-40
3.135
Typ.
5.0
Max.
85
5.25
Unit
°C
V
Electrostatic Discharge Information
Symbol
HBM
CDM
Parameter
Human Body Model (JEDEC: JESD22-A114)
Charged Device Model (JEDEC: JESD22-A101)
Value
10
2
Unit
kV
kV
© 2006 Fairchild Semiconductor Corporation
FMS6502 Rev. 1.0.0
www.fairchildsemi.com
3
FMS6502 8-Input, 6-Output Video Switch Matrix with Output Drivers, Input Clamp, and Bias Circuitry
Digital Interface
The I
2
C-compatibe interface is used to program output
enables, input-to-output routing, and input bias configu-
ration. The I
2
C address of the FMS6502 is 0x06 (0000
0110) with the ability to offset based upon the values of
the ADDR0 and ADDR1 inputs. Offset addresses are
defined below:
ADDR1
0
0
1
1
ADDR0
0
1
0
1
Binary
0000 0110
0100 0110
1000 0110
1100 0110
Hex
0x06
0x46
0x86
0xC6
Data and address data of eight bits each are written to
the FMS6502 I
2
C address register to access control
functions.
For efficiency, a single data register is shared between
two outputs for input selection. More than one output can
select the same input channel for one-to-many routing.
The clamp / bias control bits are written to their own
internal address since they should remain the same
regardless of signal routing. They are set based on the
input signal that is connected to the FMS6502.
All undefined addresses may be written without effect.
Output Control Register Contents and Defaults
Control Name
In-A
In-B
Width
4 bits
4 bits
Type
Write
Write
Default
0
0
Bit(s)
3:0
7:4
Description
Input selected to drive this output:
0000=OFF
1
, 0001=IN1, 0010=IN2, 1000=IN8
Input selected to drive this output:
0000=OFF
1
, 0001=IN1, 0010=IN2, 1000=IN8
Output Control Register MAP
Name
OUT1,2
OUT3,4
OUT5,6
Address
0x00
0x01
0x02
Bit 7
Bit 6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
B3-Out2 B2-Out2 B1-Out2 B0-Out2 B3-Out1 B2-Out1 B1-Out1 B0-Out1
B3-Out4 B2-Out4 B1-Out4 B0-Out4 B3-Out3 B2-Out3 B1-Out3 B0-Out3
B3-Out6 B2-Out6 B1-Out6 B0-Out6 B3-Out5 B2-Out5 B1-Out5 B0-Out5
Clamp Control Register Contents and Defaults
Control Name
Clmp
Width
1 bit
Type
Write
Default
0
Bit(s)
7:0
Description
Clamp / Bias selection: 1 = Clamp, 0 = Bias
Clamp Control Register Map
Name
CLAMP
Address
0x03
Bit 7
Clmp8
Bit 6
Clmp7
Bit5
Clmp6
Bit4
Clmp5
Bit3
Clmp4
Bit2
Clmp3
Bit1
Clmp2
Bit0
Clmp1
Gain Control Register Contents and Defaults
Control Name
Gain
Width
1 bit
Type
Write
Default
0
Bit(s)
7:0
Description
Output Gain selection: 0 = 6dB, 1 = 0dB
Gain Control Register Map
Name
GAIN
Address
0x04
Bit 7
Unused
Bit 6
Unused
Bit5
Gain6
Bit4
Gain5
Bit3
Gain4
Bit2
Gain3
Bit1
Gain2
Bit0
Gain1
Note:
1. When the OFF input selection is used, the output amplifier is powered down and enters a high-impedance state.
© 2006 Fairchild Semiconductor Corporation
FMS6502 Rev. 1.0.0
www.fairchildsemi.com
4
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