W25P240AF-6A datasheet, PDF - EEWORLD Datasheet

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W25P240AF-6A: DescriptionStandard SRAM, 64KX64, 7ns, CMOS, PQFP100, MO-108, QFP-100; Categorystorage storage; File Size162KB，14 Pages; ManufacturerWinbond Electronics Corporation; Websitehttp://www.winbond.com.tw

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W25P240AF-6A Overview

Standard SRAM, 64KX64, 7ns, CMOS, PQFP100, MO-108, QFP-100

W25P240AF-6A Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Winbond Electronics Corporation
Parts packaging code	QFP
package instruction	MO-108, QFP-100
Contacts	100
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.A
Maximum access time	7 ns
I/O type	COMMON
JESD-30 code	R-PQFP-G100
JESD-609 code	e0
length	20 mm
memory density	4194304 bit
Memory IC Type	STANDARD SRAM
memory width	64
Number of functions	1
Number of terminals	100
word count	65536 words
character code	64000
Operating mode	SYNCHRONOUS
Maximum operating temperature	55 °C
Minimum operating temperature
organize	64KX64
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP100,.7X.9,32
Package shape	RECTANGULAR
Package form	FLATPACK
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	3.32 mm
Maximum standby current	0.08 A
Minimum standby current	3.15 V
Maximum slew rate	0.35 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3.15 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	14 mm

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W25P240A

64K

64 BURST PIPELINED HIGH-SPEED

CMOS STATIC RAM

GENERAL DESCRIPTION

The W25P240A is a high-speed, low-power, synchronous-burst pipelined CMOS static RAM

organized as 65,536

64 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst

address counter supports Pentium™ burst mode.

FEATURES

•

Synchronous operation

•

Support 66/75 MHz bus speed

•

Single +3.3V power supply

•

Individual byte write capability

•

3.3V LVTTL compatible I/O

•

Clock-controlled and registered input

•

Asynchronous output enable

•

Internal burst counter supports Intel burst mode

•

Packaged in 100-pin QFP

BLOCK DIAGRAM

A(15:0)

INPUT

64K X 64

CORE

ARRAY

CLK

BWE

BW(8:1)

ADSC

ADSP

ADV

CONTROL

LOGIC

DATA I/O

I/O(64:1)

-1-

Publication Release Date: February 1998

Revision A4

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