FDS6575
September 2001
FDS6575
P-Channel 2.5V Specified PowerTrench
®
MOSFET
General Description
This P
-Channel 2.5V specified MOSFET is a rugged
gate version of Fairchild Semiconductor’s advanced
PowerTrench process. It has been optimized for power
management applications wih a wide range of gate
t
drive voltage (2.5V – 8V).
Features
•
–10 A, –20 V. R
DS(ON)
= 13 mΩ @ V
GS
= –4.5 V
R
DS(ON)
= 17 mΩ @ V
GS
= –2.5 V
•
Low gate charge
•
High performance trench technology for extremely
low R
DS(ON)
•
High current and power handling capability
Applications
•
Power management
•
Load switch
•
Battery protection
D
D
SO-8
DD
DD
D
D
5
6
7
4
3
2
1
Pin 1
SO-8
G
S G
S S
S S
S
T
A
=25
o
C unless otherwise noted
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
Parameter
Ratings
–20
±8
(Note 1a)
Units
V
V
A
W
–10
–50
2.5
1.5
1.2
–55 to +175
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
STG
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJA
R
θJ
C
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1c)
(Note 1)
50
125
25
°C/W
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6575
Device
FDS6575
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
©2001
Fairchild Semiconductor Corporation
FDS6575 Rev F(W)
FDS6575
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
DS
= –16 V, V
GS
= 0 V
V
GS
= 8 V,
V
GS
= –8 V,
V
DS
= 0 V
V
DS
= 0 V
Min
–20
Typ
Max Units
V
Off Characteristics
–13
–1
100
–100
mV/°C
µA
nA
nA
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
V
DS
= V
GS
, I
D
= –250
µA
I
D
= –250
µA,
Referenced to 25°C
V
GS
= –4.5 V, I
D
= –10 A
V
GS
= –2.5 V, I
D
= –9 A
V
GS
= –4.5 V, I
D
=–10A, T
J
=125°C
V
GS
= –4.5 V,
V
DS
= –5 V,
V
DS
= –5 V
I
D
= –10 A
–0.4
–0.6
3
8.5
11
11
–1.5
V
mV/°C
13
17
20
mΩ
I
D(on)
g
FS
–50
57
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= –10 V,
f = 1.0 MHz
V
GS
= 0 V,
4951
884
451
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= –10V,
V
GS
= –4.5 V,
I
D
= –1 A,
R
GEN
= 6
Ω
16
9
196
78
29
18
314
125
74
ns
ns
ns
ns
nC
nC
nC
V
DS
= –10 V,
V
GS
= –4.5 V
I
D
= –10 A,
53
6
12
Drain–Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V
GS
= 0 V, I
S
= –2.1 A
Voltage
–2.1
(Note 2)
A
V
–0.6
–1.2
a) 50 °C/W when
mounted on a 1in
2
pad of 2 oz copper
b) 105 °C/W when
mounted on a .04 in
2
pad of 2 oz copper
c) 125 °C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6575 Rev F(W)
FDS6575
Typical Characteristics
50
V
GS
= -4.5V
-3.0V
40
-I
D
, DRAIN CURRENT (A)
-2.0V
30
-1.5V
-2.5V
R
DS(ON)
NORMALIZED
,
DRAIN-SOURCE ON-RESISTANCE
2.2
2
V
GS
= - 1.5V
1.8
1.6
1.4
1.2
1
0.8
-2.0V
-2.5V
-3.0V
-3.5V
-4.5V
20
10
0
0
0.5
1
1.5
2
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
0
10
20
30
40
50
-I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.035
I
D
= -5A
R
DS(ON)
ON-RESISTANCE (OHM)
,
0.03
1.6
R
DS(ON)
NORMALIZED
,
DRAIN-SOURCE ON-RESISTANCE
I
D
= -10A
V
GS
= - 4.5V
1.4
0.025
0.02
T
A
= 125
o
C
0.015
1.2
1
0.8
0.01
T
A
= 25
o
C
0.005
0
1
2
3
4
5
0.6
-50
-25
0
25
50
75
100
125
150
175
T
J
, JUNCTION TEMPERATURE (
o
C)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
50
-I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= -5V
40
-I
D
, DRAIN CURRENT (A)
T
A
= -55
o
C
25 C
125
o
C
o
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
V
GS
= 0V
1
T
A
= 125
o
C
0.1
25
o
C
0.01
-55
o
C
0.001
30
20
10
0
0
0.5
1
1.5
2
-V
GS
, GATE TO SOURCE VOLTAGE (V)
0.0001
0
0.2
0.4
0.6
0.8
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6575 Rev F(W)
FDS6575
Typical Characteristics
5
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -10A
4
-15V
3
CAPACITANCE (pF)
V
DS
= -5V
-10V
6000
C
ISS
5000
f = 1 MHz
V
GS
= 0 V
4000
3000
2
2000
C
OSS
1
1000
0
0
10
20
30
40
50
60
Q
g
, GATE CHARGE (nC)
C
RSS
0
0
5
10
15
20
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
1ms
10ms
100ms
1s
10s
DC
V
GS
= -4.5V
SINGLE PULSE
R
θJA
= 125
o
C/W
T
A
= 25
o
C
0.01
0.01
P(pk), PEAK TRANSIENT POWER (W)
100
µ
R
DS(ON)
LIMIT
50
Figure 8. Capacitance Characteristics.
40
-I
D
, DRAIN CURRENT (A)
10
SINGLE PULSE
R
θ
JA
= 125°C/W
T
A
= 25°C
30
1
20
0.1
10
0.1
1
10
100
0
0.001
0.01
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
R
θ
JA
(t) = r(t) + R
θ
JA
R
θJA
= 125 C/W
P(pk)
t
1
t
2
SINGLE PULSE
o
0.1
0.1
0.05
0.02
0.01
0.01
T
J
- T
A
= P * R
θ
JA
(t)
Duty Cycle, D = t
1
/ t
2
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6575 Rev F(W)
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging
Configuration:
Figure 1.0
ATTENTION
OBSER PRECAUTIONS
VE
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
N
NT IO
NS
AT TE
RVE PR ECAUTIO
G
OBSE
DLIN
H AN
IC
FOR
STAT
TRO
ELEC
ITIVE
SENS
ES
DEVIC
Packaging Description:
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13” or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7” or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Embossed ESD Marking
Antistatic Cover Tape
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
SOIC (8lds) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit(gm)
Weight per Reel (kg)
Note/Comments
Standard
(no flow code)
TNR
2,500
13” Dia
355x333x40
5,000
0.0774
0.6060
L86Z
Rail/Tube
95
-
530x130x83
30,000
0.0774
-
F011
TNR
4,000
13” Dia
355x333x40
8,000
0.0774
0.9696
D84Z
TNR
500
7” Dia
193x183x80
2,000
0.0774
0.1182
F852
NDS
9959
Pin 1
SOIC-8 Unit Orientation
Barcode Label
Barcode
Label
Barcode
Label
355mm x 333mm x 40mm
Intermediate container for 13” reel option
Barcode Label sample
193mm x 183mm x 80mm
Pizza Box for Standard Option
SOIC(8lds)Tape
Leader and Trailer
Configuration:
Figure 2.0
CBVK741B019
FDS9953A
FSID: FDS9953A
LOT: CBVK741B019
3000
QTY: 2500
SPEC:
(F63T NR)
D/C1: Z9842AB QTY1:
SPEC REV:
D/C2:
QTY2:
CPN:
FAIRCHILD SEMICONDUCTOR CORPORATION
Carrier Tape
Cover Tape
Components
Tr ailer Ta pe
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
©2001 Fairchild Semiconductor Corporation
June 2001, Rev. C1
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