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UT69R00012GPX

Description
RISC Microcontroller, 32-Bit, 12MHz, CMOS, CPGA144, CERAMIC, PGA-144
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size1MB,64 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

UT69R00012GPX Overview

RISC Microcontroller, 32-Bit, 12MHz, CMOS, CPGA144, CERAMIC, PGA-144

UT69R00012GPX Parametric

Parameter NameAttribute value
MakerCobham Semiconductor Solutions
Parts packaging codePGA
package instructionPGA,
Contacts144
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
Has ADCNO
Address bus width20
bit size32
maximum clock frequency12 MHz
DAC channelNO
DMA channelNO
External data bus width16
JESD-30 codeS-CPGA-P144
length39.751 mm
Number of terminals144
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
PWM channelNO
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codePGA
Package shapeSQUARE
Package formGRID ARRAY
Certification statusNot Qualified
Maximum seat height4.826 mm
speed12 MHz
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
width39.751 mm
uPs/uCs/peripheral integrated circuit typeMICROCONTROLLER, RISC
Standard Products
UT69R000 RadHard MicroController
Data Sheet
October 2005
Harvard architecture
- 64K data space
- 1M instruction space
High throughput engine
- 2 clocks per instruction
- 8 MIPS @ 16 MHz
- Static design
15 levels of interrupts
- 8 external user defined interrupts
- Machine error and power fail
Two on-board 16-bit interval timers
- Timer A, 10
µs/bit
- Timer B, 100
µs/bit
resolution
8-bit software controlled output discrete bus
Register- oriented architecture has 21
user-accessible registers
- 16-bit or 32-bit register configurations
Supports direct memory access (DMA) system
configuration
OSCOUT
OE
WE
BRQ
BGNT
BUSY
BGACK
NUI1
NUI2
NUI3
STATE1
DI1
DI2
MEMORY
CONTROL
BUS
ARBITRA-
TION
PROCES-
SOR
STATUS
OSCIN
SYSCLK
Built-in 9600 baud UART
Full military operating temperature range, -55
o
C to
+125
o
C, in accordance with MIL-PRF-38535 for Class Q
or V
Typical radiation performance:
- Total dose: 1.0E6 rads(Si)
- SEL Immune >100 MeV-cm
2
/mg
- LET
TH
(0.25) = 60 MeV-cm
2
/mg
- Saturated Cross Section (cm
2
) per bit, 1.2E-7
- 2.3E-11 errors/bit-day, Adams to 90%
geosynchronous heavy ion
Post-radiation AC/DC performance characteristics
guaranteed by MIL-STD-883 Method 1019 testing
at 1.0E6 rads(Si)
Latchup immune 1.5-micron CMOS, epitaxial,
double-level-metal technology
Packaging options:
- 132-lead flatpack
- 144-pin pingrid array (plus one index pin)
16
TIMCLK
TES
T
UARTOUT
UARTIN
UART
OSCILLATOR
/CLOCK
SHIFT REG
PROCESSOR
CONTROL
LOGIC
ID
32
GENERAL
PURPOSE
REGISTERS
TBR
RBR
TR
32
32
BIT REG
32
TB
IM
TEMP DEST
16
TEMP SRC
FR
PI
ST
SW
32
32
16
16
16
16
16
16
16
I/O
MUX
INSTRUCTION
DATA
16
IC/ICs
INSTRUCTION
ADDRESS
MCHNE1
BTERR
MCHNE2
MPROT
PFAIL
INT5
INT6
INT0-4
MRST
20
ADD
MUX
32
ACC
32
PIPELINE
BUS
CONTROL
8
16
OD(7:0)
OPERAND
DATA
DTACK
M/IO
R/WR
DS
OPERAND
ADDRESS
A MUX
INTER-
RUPTS
B MUX
32-BIT ALU
16
32
16
ADDR
MUX
5
Figure 1. UT69R000 Functional Block Diagram
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