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ACNV260E

Description
2mm DTI, 10MBd Digital Optocoupler 13mm creepage and clearance
File Size310KB,10 Pages
ManufacturerAVAGO
Websitehttp://www.avagotech.com/
Download Datasheet View All

ACNV260E Overview

2mm DTI, 10MBd Digital Optocoupler 13mm creepage and clearance

ACNV260E
2mm DTI, 10MBd Digital Optocoupler
Data Sheet
Description
The new ACNV260E is an optically coupled gate that
combines a AlGaAs light emitting diode and an inte-
grated photo detector housed in a widebody package.
ACNV260E is designed and manufactured to comply
with EN60079-11 ATEX and IECEx. The distance-through-
insulation (DTI) between the emitting diode and photo-
detector is at 2mm. The output of the detector IC is an
open collector Schottky clamped transistor. The internal
shield provides a guaranteed common mode transient
immunity specification of 20,000 V/μs at V
cm
= 1500V
This unique design provides maximum ac and dc circuit
isolation while achieving TTL compatibility.
The new ACNV260E is suitable for high speed logic inter-
facing, input/output buffering, as line receivers in envi-
ronments that conventional line receivers cannot tolerate
and are recommended for use in extremely high ground
or induced noise environments.
Features
Compliant to EN60079-11 ATEX and IECEx (375V)
2mm DTI
13mm creepage and clearance
20 kV/μs Minimum Common Mode Rejection (CMR) at
VCM = 1500 V
High Speed: 10 MBd Typical
TTL Compatible
Guaranteed ac and dc performance over temperature:
-40°C to +105°C
Available in 10-Pin widebody packages
Safety Approval
– Approval at 5000 Vrms for 1 minute per UL1577
– CSA
Applications
High Voltage insulation
Intrinsic safety circuit
PCB Board Power System Isolation
Industrial Equipment Power Isolation
Functional Diagram
NC
1
Anode
2
Cathode
3
NC
4
NC
5
SHIELD
10
Vcc
9
Ve
8
Vo
7
GND
6
NC
Truth Table
(Positive Logic)
LED ENABLE OUTPUT
On
Off
On
Off
On
Off
H
H
L
L
NC
NC
L
H
H
H
L
H
A 0.1
μF
bypass capacitor must be connected between pins V
CC
and
GND.
CAUTION:
It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.

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