HSMP-3816
Quad PIN Diode
π
Attenuator 300 kHz to 4 GHz
in SOT 25 Package
Data Sheet
Description
Avago Technologies’ HSMP-3816 is a wideband, low
insertion loss, high IIP3, Quad PIN Attenuator in a low cost
surface mount SOT-25 package. It provides a good match
and flat attenuation over an extremely wide band from
300 kHz to 4 GHz.
The SOT-25 packages gives a reduction in part count and
takes up less space on board compared to multi package
solutions.
Four PIN Diodes in one package encourages performance
repeatability for improved production yield at board
level.
Features
•
4 PIN Diodes in a SOT-25 package
•
300 kHz to 4 GHz usable frequency band
•
High Linearity
•
Low insertion Loss
•
MSL-1 and Lead-free
•
Tape & Reel packaging option available
Specification At 1 GHz, V+=5V
•
IIP3 = 45 dBm (Typical)
•
Attenuation = 38 dB (Typical)
•
Insertion Loss = -3 dB (Typical)
•
Return Loss = - 22 dB (Typical)
Package Marking and Pin connections
3
2
1
Note:
Package marking provides
orientation and identification
“AT”= Device Code
“x” = Month code indicates
the month of manufacture
Applications
•
Broadband system application
(i.e., CATV, WCDMA, etc)
•
General purpose Voltage-Control-Attenuator
for high linearity applications.
ATx
4
5
Pin 3 :
RF In/Out
Pin 2 :
Series
Bias
Pin 1 :
RF In/Out
Pin 4 :
Shunt
Bias
Pin 5 :
Shunt
Bias
Absolute Max Ratings
[1]
, Tc = +25
o
C
Symbol
I
f
P
IV
T
j
T
stg
q
lb
P
In
Parameter
Forward Current (1 µs Pulse)
Peak Inverse Voltage
Junction Temperature
Storage Temperature
Thermal Resistance
[2]
Input Power
[3]
Unit
Amp
V
°C
°C
°C/W
W
Abs Max
1
100
150
-60 to 150
167
1.0
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the device.
2. Thermal Resistance is measured from junction to board using IR method.
3. The Max Input Power is tested using demoboard as shown in Figure 1 at the worst-case (highest attenuation) bias condition of V+=5V, Vc=0V.
Electrical Specifications, Tc = +25
o
C (Each Diode)
Minimum
Breakdown
Voltage
V
BR
(V)
100
Test
Conditions
V
R
= V
BR
Measure
I
R
≤ 10uA
Maximum
Total
Capacitance
C
T
(pF)
0.35
V
R
= 50V
f = 1MHz
Minimum
Resistance
at I
F
= 0.01mA,
R
H
(Ω)
1500
I
F
= 0.01mA
f = 100MHz
Maximum
Resistance
at I
F
= 20mA,
R
L
(Ω)
10
I
F
= 20mA
f = 100MHz
Maximum
Resistance
at I
F
= 100mA,
R
T
(Ω)
3.0
I
F
= 100mA
f = 100MHz
Resistance
at I
F
= 1mA,
R
M
(Ω)
45 to 80
I
F
= 1mA
f = 100MHz
Note : Rs parameters are tested under AQL 1.0
Typical Performance, Tc = +25
o
C (Each Diode)
Carrier Lifetime
t(ns)
1500
Test
Condition
I
F
= 50mA
I
R
= 250 mA
Reverse Recovery Time
T
rr
(ns)
300
V
R
= 10 V
I
F
= 20 mA
90% Recovery
Total Capacitance
C
T
(pF)
0.27
V
R
= 50V
f = 1MHz
Typical Performance for HSMP-3816 Quad PIN Diode
π
Attenuator @ +25
o
C
Parameter
Insertion Loss
Return Loss
Attenuation
Input IP3
Input IP3
Input IP3
Input IP3
Input IP3
Input IP3
Test Condition
Vc = 15V, V+ = 5V, Freq = 1GHz
Vc = 0V, V+ = 5V, Freq = 1GHz
Vc = 0V, V+ = 5V, Freq = 1GHz
Vc = 1.5V, V+ = 5V, Freq = 1GHz
Vc = 15V, V+ = 5V, Freq = 1GHz
Vc = 1.5V, V+ = 5V, Freq = 100MHz
Vc = 15V, V+ = 5V, Freq = 100MHz
Vc = 1.5V, V+ = 5V, Freq = 30MHz
Vc = 15V, V+ = 5V, Freq = 30MHz
Units
dB
dB
dB
dBm
dBm
dBm
dBm
dBm
dBm
Typical
-3.0
-22
38
45
42
37
37
35
35
Notes :
1. Measurement above obtained using Wideband RF circuit design shown in Figure 1 & 2
2
C3
Vc
R3
Iseries
Typical Performance Curves for Single Diode@ Tc = +25
o
C,
10000
C2
In/Out
T
A
= +85˚C
T
A
= +25˚C
T
A
= - 55˚C
C1
In/Out
HSMP-3816
Ishunt
R1
R2
RF Resistance (OHMS)
1000
100
R4
C4
R4
R5
V+
C5
10
1
0.01
0.10
1.00
10.00
IF - Forward Bias Current (mA)
100.00
Figure 1. Wideband Quad PIN Diode
π
Attenuator Circuit
Figure 3. RF Resistance vs. Forward Bias Current
Vc
Via Hole
to GND
100.00
IF - Forward Current (mA)
C3
R3
10.00
1.00
0.10
+125°C
+25°C
- 50°C
C1
R1
C4
R4
ATx
C5
R4
R5
V+
R2
C2
Via Hole
to GND
0.01
Via Hole
to GND
0
0.2
0.4
0.6
0.8
VF- Forward Voltage (V)
1
1.2
Figure 4. Forward Current vs. Forward Voltage
Figure 2. Circuit Board Layout
0.60
Component
R1,R2
R3
R4
R5
C1-C5
Value
560 Ohm
330 Ohm
1500 Ohm
680 Ohm
47000 pF
Total Capacitance (pF)
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0
4
8
12
Reverse Voltage (V)
16
20
F=1 MHz
F=10 MHz
Figure 5. RF Capacitance vs Reverse Bias
3
Typical Performance Curves for HSMP-3816, @ V+ = 5V, Tc = +25
o
C
100
60
40
F = 10 MHz
F = 100 MHz
F = 1 GHz
F = 3 GHz
0
Vc=15V
-10
6.0
-20
Insertion Loss (dB)
-30
-40
-50
-60
-70
2.4
1.7
1.3
1.17
1.1
Vc=0V
Attenuation (dB)
20
10
1
0
1
Control Voltage Vc (Volts)
10
-80
-90
-100
10
100
Frequency (MHz)
1000
Figure 6. Attenuation vs. Control Voltage
Figure 7. Insertion Loss vs. Frequency
0
-10
IP3 - Input (dBm)
50
45
F = 1 GHz
Return Loss (dB)
-20
Vc=0V
40
35
30
25
20
0
2
4
6
8
10 12 14
Vc - Control Voltage (V)
F = 100 MHz
F = 30 MHz
-30
Vc=15V
-40
-50
10
100
Frequency (MHz)
1000
16
18 20
Figure 8. Return Loss vs. Frequency
Figure 9. Input IIP3 vs. Control Voltage
2
1.8
I series
1.6
1.4
1.2
1
0.8
0.6
0.4
I shunt
0.2
0
45
40
35
30
Attenuation (dB)
25
20
15
10
5
0
-40
-20
0
20
40
Temp (Degree C)
60
Vc=0V
1.1V
1.3V
1.7V
Series Diode Bias Current - Iseries (mA)
16
14
12
10
8
6
4
2
0
0
5
Shunt Diode Bias Current - Ishunt (mA)
18
2.4V
6V
15V
80
10
15
Control Voltage Vc (Volts)
20
Figure 10. Series & Shunt Diode Bias Current vs. Control Voltage
Figure 11. Attenuation vs. Temperature
Note:
1. Measurements above were obtained using Wideband RF circuit design shown in Figures 1 and 2.
2. Typical values were derived using limited samples during initial product characterization and may not be representative of the overall distribution.
4
Package Outline & Dimension
D
Dimension
Symbol
D
Minimum
2.80
2.60
1.50
1.88
0.93
0.35
0.9
0.08
0.35
0
0.9
Nominal
2.90
2.80
1.60
1.90
0.95
1.15
Maximum
3.00
3.00
1.70
1.92
0.97
0.50
1.30
0.22
0.60
0.15
1.40
H
E
H
E
e1
e
B
L2
B
e1
e
C
L
PKG
A
A2
C
L
A1
A
A2
A1
0.250
SEATING
PLANE
L
GAGE PLANE
C
PCB Footprint
0.074
1.9
0.037
0.95
0.094
2.4
0.039
1.0
0.028
0.7
DIMENSIONS IN
Inches
mm
5
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