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71V016SA10PHG

Description
64K X 16 STANDARD SRAM, 10 ns, PDSO44
Categorystorage   
File Size278KB,9 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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71V016SA10PHG Overview

64K X 16 STANDARD SRAM, 10 ns, PDSO44

71V016SA10PHG Parametric

Parameter NameAttribute value
Number of functions1
Number of terminals44
Maximum operating temperature70 Cel
Minimum operating temperature0.0 Cel
Maximum supply/operating voltage3.6 V
Minimum supply/operating voltage3.15 V
Rated supply voltage3.3 V
maximum access time10 ns
Processing package description0.400 INCH, GREEN, TSOP2-44
Lead-freeYes
stateACTIVE
CraftsmanshipCMOS
packaging shapeRECTANGULAR
Package SizeSMALL OUTLINE
surface mountYes
Terminal formGULL WING
Terminal spacing0.8000 mm
terminal coatingMATTE TIN
Terminal locationDUAL
Packaging MaterialsPLASTIC/EPOXY
Temperature levelCOMMERCIAL
memory width16
organize64K X 16
storage density1.05E6 deg
operating modeASYNCHRONOUS
Number of digits65536 words
Number of digits64K
Memory IC typeSTANDARD SRAM
serial parallelPARALLEL
3.3V CMOS Static RAM
1 Meg (64K x 16-Bit)
Features
IDT71V016SA
64K x 16 advanced high-speed CMOS Static RAM
Equal access and cycle times
— Commercial: 10/12/15/20ns
— Industrial: 12/15/20ns
One Chip Select plus one Output Enable pin
Bidirectional data inputs and outputs directly
LVTTL-compatible
Low power consumption via chip deselect
Upper and Lower Byte Enable Pins
Single 3.3V power supply
Available in 44-pin Plastic SOJ, 44-pin TSOP, and
48-Ball Plastic FBGA packages
Description
The IDT71V016 is a 1,048,576-bit high-speed Static RAM organized
as 64K x 16. It is fabricated using IDT’s high-perfomance, high-reliability
CMOS technology. This state-of-the-art technology, combined with inno-
vative circuit design techniques, provides a cost-effective solution for high-
speed memory needs.
The IDT71V016 has an output enable pin which operates as fast
as 5ns, with address access times as fast as 10ns. All bidirectional
inputs and outputs of the IDT71V016 are LVTTL-compatible and operation
is from a single 3.3V supply. Fully static asynchronous circuitry is used,
requiring no clocks or refresh for operation.
The IDT71V016 is packaged in a JEDEC standard 44-pin Plastic
SOJ, a 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.
Functional Block Diagram
Output
Enable
Buffer
OE
A
0
– A
15
Address
Buffers
Row / Column
Decoders
I/O
15
Chip
Enable
Buffer
Sense
Amps
and
Write
Drivers
8
Low
Byte
I/O
Buffer
8
8
High
Byte
I/O
Buffer
8
CS
I/O
8
WE
Write
Enable
Buffer
64K x 16
Memory
Array
16
I/O
7
I/O
0
BHE
Byte
Enable
Buffers
BLE
3834 drw 01
OCTOBER 2011
1
©2011 Integrated Device Technology, Inc.
DSC-3834/11
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