Crimzon
TM
Infrared Microcontrollers
ZLR16300 ROM MCU Family
Product Brief
PB012103-0904
PRELIMINARY
Product Block Diagram
Watch-Dog
Timer
T8 Timer
Capture & Transmit
T16 Timer
Capture & Transmit
237 Bytes RAM
Up to
Power-On
16KB ROM
Reset
2
Compar-
ators
–
•
Programmable input glitch filter for pulse
reception
Z8
®
Core
Six priority interrupts
–
Three external
–
Two assigned to counter/timers
–
One low-voltage detection interrupt
High and Low voltage detection flags
Programmable Watch-Dog Timer (WDT)
Power-On Reset (POR) circuits
Two independent comparators with
programmable interrupt polarity
Mask selectable pull-up transistors on ports 0,
2, 3
Programmable mask options
–
Port 0: 0–3 pull-ups
–
Port 0: 4–7 pull-ups
–
Port 2: 0–7 pull-ups
–
Port 3: 0–3 pull-ups
–
WDT enabled at POR
•
•
•
•
•
Low Battery Voltage
Detection
High Battery Voltage
Detection
24 I/O lines
16 I/O lines
•
Features
•
•
•
2.0–3.6V operation
Low power consumption–6MW (typical)
Three standby modes
–
STOP—2µA (typical)
–
HALT—0.8mA (typical)
–
Low voltage
Special architecture to automate both
generation and reception of complex pulses or
signals:
–
One programmable 8-bit counter/timer
with two capture registers and two load
registers
–
One programmable 16-bit counter/timer
with one 16-bit capture register pair and
one 16-bit load register pair
General Description
The ZLR16300 is a ROM-based member of the
Crimzon
TM
MCU family of infrared microcontrol-
lers. With 237 bytes of general-purpose RAM and
up to 16KB of ROM, ZiLOG’s CMOS microcon-
trollers offer fast executing, efficient use of mem-
ory, sophisticated interrupts, input/output bit
manipulation capabilities, automated pulse genera-
tion/reception, and internal pull-up transistors.
This device is compatible with ZLP32300 OTP
devices.
•
ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126
Telephone: 408.558.8500 • Fax: 408.558.8300 •
www.ZiLOG.com
ZLR16300 ROM MCU Family
Product Brief
3
Pin-Outs
Figure 2 depicts the pins for the 20-pin ZLR16300. Figure 3 depicts the pins for the 28-pin ZLR16300.
P25
P26
P27
P07
V
DD
XTAL2
XTAL1
P31
P32
P33
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
P24
P23
P22
P21
P20
V
SS
P01
P00/Pref1/P30
P36
P34
20-Pin
PDIP
SOIC
SSOP
Figure 2. 20-Pin DIP/SOIC/SSOP Pin Assignment
P25
P26
P27
P04
P05
P06
P07
V
DD
XTAL2
XTAL1
P31
P32
P33
P34
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28-Pin
PDIP
SOIC
SSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
P24
P23
P22
P21
P20
P03
V
SS
P02
P01
P00
Pref1/P30
P36
P37
P35
Figure 3. 28-Pin DIP/SOIC/SSOP Pin Assignment
Development Suite
The following development tools are available for the programming and debugging of this device:
•
•
•
ZLP323ICE01ZEM emulator/programmer
ZLP32300100KIT Development System (included in ZLP323ICE01ZEM)
ZiLOG Developer Studio II (ZDSII) (included in ZLP323ICE01ZEM)
PB012103-0904
Development Suite
ZLR16300 ROM MCU Family
Product Brief
5
This publication is subject to replacement by a later edition. To determine whether a later edition exists, or to request
copies of publications, contact:
ZiLOG Worldwide Headquarters
532 Race Street
San Jose, CA 95126
Telephone: 408.558.8500
Fax: 408.558.8300
www.ZiLOG.com
Document Disclaimer
ZiLOG is a registered trademark of ZiLOG Inc. in the United States and in other countries. All other products and/or
service names mentioned herein may be trademarks of the companies with which they are associated.
©2004 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or
technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT
ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION,
DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME
LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED IN ANY MANNER TO USE OF
INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. Except with the
express written approval ZiLOG, use of information, devices, or technology as critical components of life support
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any intellectual property rights.
PB012103-0904
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