ATMEGA48PA-MN datasheet, PDF - EEWORLD Datasheet

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ATMEGA48PA-MN: DescriptionIC MCU 8BIT 4KB FLASH 32VQFN; CategoryThe embedded processor and controller Microcontrollers and processors; File Size559KB，31 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

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ATMEGA48PA-MN Overview

IC MCU 8BIT 4KB FLASH 32VQFN

ATMEGA48PA-MN Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	HVQCCN, LCC32,.2SQ,20
Reach Compliance Code	compliant
Factory Lead Time	4 weeks
Has ADC	YES
Other features	IT ALSO OPERATES 1.8V AT 4 MHZ
Address bus width
bit size	8
boundary scan	NO
CPU series	AVR RISC
maximum clock frequency	20 MHz
DAC channel	NO
DMA channel	NO
External data bus width
Format	FIXED POINT
Integrated cache	NO
JESD-30 code	S-PQCC-N32
JESD-609 code	e3
length	5 mm
low power mode	YES
Humidity sensitivity level	3
Number of external interrupt devices	2
Number of I/O lines	23
Number of serial I/Os	1
Number of terminals	32
Number of timers	3
On-chip data RAM width	8
On-chip program ROM width	16
Maximum operating temperature	105 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	HVQCCN
Encapsulate equivalent code	LCC32,.2SQ,20
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	2/5 V
Certification status	Not Qualified
RAM (bytes)	512
RAM (number of words)	512
rom(word)	2048
ROM programmability	FLASH
Maximum seat height	1 mm
speed	20 MHz
Maximum slew rate	2.7 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	5 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER, RISC

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Atmel 8-bit

Microcontroller with 4/8/16/32KBytes In-

System Programmable Flash

ATmega48A; ATmega48PA; ATmega88A; ATmega88PA;

ATmega168A; ATmega168PA; ATmega328; ATmega328P

SUMMARY

Features

•

High

Performance, Low Power Atmel

AVR

8-Bit Microcontroller Family

Advanced RISC Architecture

– 131 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Fully Static Operation

– Up to 20 MIPS Throughput at 20MHz

– On-chip 2-cycle Multiplier

High Endurance Non-volatile Memory Segments

– 4/8/16/32KBytes of In-System Self-Programmable Flash program memory

– 256/512/512/1KBytes EEPROM

– 512/1K/1K/2KBytes Internal SRAM

– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM

– Data retention: 20 years at 85C/100 years at 25C

(1)

– Optional Boot Code Section with Independent Lock Bits

In-System Programming by On-chip Boot Program

True Read-While-Write Operation

– Programming Lock for Software Security

Atmel

QTouch

library support

– Capacitive touch buttons, sliders and wheels

– QTouch and QMatrix

acquisition

– Up to 64 sense channels

Peripheral Features

– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode

– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode

– Real Time Counter with Separate Oscillator

– Six PWM Channels

– 8-channel 10-bit ADC in TQFP and QFN/MLF package

Temperature Measurement

– 6-channel 10-bit ADC in PDIP Package

Temperature Measurement

– Programmable Serial USART

– Master/Slave SPI Serial Interface

– Byte-oriented 2-wire Serial Interface (Philips I

C compatible)

– Programmable Watchdog Timer with Separate On-chip Oscillator

– On-chip Analog Comparator

– Interrupt and Wake-up on Pin Change

Special Microcontroller Features

– Power-on Reset and Programmable Brown-out Detection

– Internal Calibrated Oscillator

– External and Internal Interrupt Sources

– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby

I/O and Packages

– 23 Programmable I/O Lines

– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF

Operating Voltage:

– 1.8 - 5.5V

Temperature Range:

– -40C to 85C

Speed Grade:

– 0 - 4MHz@1.8 - 5.5V, 0 - 10MHz@2.7 - 5.5.V, 0 - 20MHz @ 4.5 - 5.5V

Power Consumption at 1MHz, 1.8V, 25C

– Active Mode: 0.2mA

– Power-down Mode: 0.1µA

– Power-save Mode: 0.75µA (Including 32kHz RTC)

•

8271GS–AVR–02/2013

1.1

1.1.1

Pin Descriptions

VCC

Digital supply voltage.

GND

Ground.

Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buf-

fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are

externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a

reset condition becomes active, even if the clock is not running.

Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator amplifier and

input to the internal clock operating circuit.

Depending on the clock selection fuse settings, PB7 can be used as output from the inverting Oscillator amplifier.

If the Internal Calibrated RC Oscillator is used as chip clock source, PB7...6 is used as TOSC2...1 input for the

Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.

The various special features of Port B are elaborated in

”Alternate Functions of Port B” on page 83

and

”System

Clock and Clock Options” on page 26.

1.1.2

1.1.3

1.1.4

Port C (PC5:0)

Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PC5...0 output buf-

fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are

externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a

reset condition becomes active, even if the clock is not running.

PC6/RESET

If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical characteristics of PC6 dif-

fer from those of the other pins of Port C.

If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level on this pin for longer than the

minimum pulse length will generate a Reset, even if the clock is not running. The minimum pulse length is given in

Table 29-12 on page 310.

Shorter pulses are not guaranteed to generate a Reset.

The various special features of Port C are elaborated in

”Alternate Functions of Port C” on page 86.

1.1.5

1.1.6

Port D (PD7:0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buf-

fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are

externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a

reset condition becomes active, even if the clock is not running.

The various special features of Port D are elaborated in

”Alternate Functions of Port D” on page 89.

1.1.7

is the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6. It should be externally connected to V

even if the ADC is not used. If the ADC is used, it should be connected to V

through a low-pass filter. Note that

PC6...4 use digital supply voltage, V

ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET SUMMARY]

8271GS–AVR–02/2013

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