Features ....................................................................................................................................................................................... 5
Ordering Information ...................................................................................................................................................................... 6
Power - Estimated..................................................................................................................................................................... 10
Test Definitions ............................................................................................................................................................................. 17
Test Regions of Interest ............................................................................................................................................................ 17
Test Sub Regions of Interest ..................................................................................................................................................... 17
Maximum Ratings ..................................................................................................................................................................... 20
Maximum Voltage Ratings Between Pins ................................................................................................................................ 20
DC Bias Operating Conditions .................................................................................................................................................. 21
AC Operating Conditions ........................................................................................................................................................... 22
Clock Line Capacitances ....................................................................................................................................................... 22
Timing Sequence A ................................................................................................................................................................ 24
Timing Sequence B ................................................................................................................................................................ 25
Timing Sequence C ................................................................................................................................................................ 26
One Output Full Field ............................................................................................................................................................ 29
Two Outputs Full Field .......................................................................................................................................................... 30
One Output Center Columns ................................................................................................................................................. 31
Two Outputs Center Columns ............................................................................................................................................... 32
One Output Center Rows ....................................................................................................................................................... 33
Two Outputs Center Rows ..................................................................................................................................................... 34
One Output Center Rows and Columns ................................................................................................................................ 35
Two Outputs Center Rows and Columns .............................................................................................................................. 36
Electronic Shutter – Integration Time Definition ................................................................................................................. 45
Fast Line Dump Timing ......................................................................................................................................................... 46
Example HCCD Clock Driver..................................................................................................................................................... 47
Single Output Only ................................................................................................................................................................. 47
Selectable Single or Dual Output.......................................................................................................................................... 47
Storage and Handling ................................................................................................................................................................... 48
Cover Glass Care and Cleanliness ........................................................................................................................................... 48
Die to Package Alignment ......................................................................................................................................................... 50
Liability of the Supplier ............................................................................................................................................................. 54
Liability of the Customer ........................................................................................................................................................... 54
Test Data Retention ................................................................................................................................................................... 54
Warning: Life Support Applications policy ................................................................................................................................... 54
Figure 3: Power ............................................................................................................................................................................. 10
Figure 5: Monochrome with Microlens Quantum Efficiency ....................................................................................................... 15
Figure 6: Color with Microlens Quantum Efficiency .................................................................................................................... 15
Figure 7: Monochrome without Microlens Quantum Efficiency .................................................................................................. 16
Figure 9: Test Sub Regions of Interest ......................................................................................................................................... 17
Figure 10: Overclock Regions of Interest ..................................................................................................................................... 17
Figure 18: Integration Time Definition ......................................................................................................................................... 45
Figure 19: Fast Line Dump Timing ............................................................................................................................................... 46
Figure 21: Die to Package Alignment ........................................................................................................................................... 50
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