P R E L I M I N A R Y
Le8575
Dual-Resistive, Subscriber Line Interface Circuit (SLIC) Device
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Two channels in a single package
Serial data interface
Per-channel powerdown
Low standby power (≤65 mW per channel)
Integrated protection
No external protection device required
Battery noise cancellation
Switchhook detector
Ring-trip detector
Switchhook and ring-trip detector self-test
Fault detector
Zero ring voltage cross detection
Three relay drivers per channel
44-pin, surface-mount, plastic package (PLCC)
DESCRIPTION
The Le8575 is a dual-resistive, low-cost subscriber line
interface circuit (SLIC) device that is optimized to meet both
ITU-T recommendations and LSSGR requirements for 600
Ω/
900−Ω resistive and complex impedance termination
applications. It interfaces the low-voltage circuits on an analog
line card to the Tip and Ring of two subscriber loops. The
Le8575 does not supply DC current to the subscriber loops—
external resistors are used for this purpose. The device is
available in a 44-pin PLCC package.
BLOCK DIAGRAM
RDDA
RDRA
RDRA
DGND V
DDD
DI
DO
CLK
EN
RDTB
RDRB
RDDB
RELAY
DRIVER
RELAY
DRIVER
RELAY
DRIVER
+5D
SERIAL DATA INTERFACE,
LATCHES, AND LOGIC
RELAY
DRIVER
RELAY
DRIVER
RELAY
DRIVER
NFLTA
V
BAT
SWITCHHOOK
AND
FAULT DETECTORS A
NLCA
CONTROL
DETECTORS
CFLTA
TSA
RSA
–
AXA
+
TIP CURRENT
SOURCE A
XMTA
TSTA
PDA
PTA
RTPA
RTNA
RING-TRIP
DETECTOR A
RECEIVE
INTERFACE AND
BATTERY NOISE
CANCELLATION A
VRNA
IRPA
CBNA
RGBNA
PRA
SWITCHHOOK
AND
FAULT DETECTORS B
NPLTB
NLCB
RING CURRENT
SOURCE A
CFLTB
NRTA
V
BAT
V
BAT
V
BAT
TSB
RSB
–
AXB
+
TIP CURRENT
SOURCE B
TSTB
PDB
XMTB
ORDERING INFORMATION
Device
Le8575BEJC
Package
44-Pin PLCC
PTB
RTPB
RTNB
PRB
+5 A
V
BAT
V
BAT
V
DDA
AGND
V
BAT
RING CURRENT
SOURCE B
RECEIVE
INTERFACE AND
BATTERY NOISE
CANCELLATION B
VRNB
IRPB
CBNB
RGBNB
RING-TRIP
DETECTOR B
NRTB
V
BAT
Document ID#
081xxx Date:
Document ID#
081073
Date:
Jan 13, 2003
Nov 29, 2004
Rev:
Rev:
N
A
Version: 1
Version:
1
Distribution:
Distribution:
Public Document
Public Document
P R E L I M I N A R Y
TABLE OF CONTENTS
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Absolute Maximum Ratings (@ TA = 25
°C)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Serial Interface and Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Resistor Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Tip/Ring Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Receive Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Transmit Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Battery Noise Cancellation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
On-Hook Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Self-Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Serial Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Operating States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Active State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Test State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Powerdown State with Relay Driver RDD Operated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Powerdown State. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Ringing State (D2 = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Supervision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Off-Hook Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Ring-Trip Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Ring-Trip Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Fault Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Zero Voltage Current Cross . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
I/V Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
Loop Length . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
AC Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Codec Features and Selection Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Design Equations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
Physical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
44-Pin PLCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
2
Le8575 Dual-Resistive SLIC Device
P R E L I M I N A R Y
LIST OF FIGURES
Figure 1. Power Supply Rejection vs. Frequency Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 2. SLIC Device Resistor Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 3. Le8575 SLIC Device Dual-Resistive Matching Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 4. Self-Test Mode Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 5. Timing Requirements for CLK, EN, DI, and DO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 6. Logic Diagram (Positive Logic; Flip-Flops Clocked on High-to-Low Transition) . . . . . . . . . . . . . . .
Figure 7. Ring-Trip Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 8. Ring-Trip Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 9. Le8575 SLIC Device I/V Template . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 10. Equivalent Complex Terminations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 11. Initial AC Interface for Complex Termination Between Le8575 SLIC device and T7504 Codec .
Figure 12. Revised AC Interface CT and CR Combined into a Single Capacitor CS . . . . . . . . . . . . . . . . . .
Figure 13. Addition of Resistor RSC from XMT to IRP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figure 14. Typical Application Diagram with Blocking Capacitors (CB) Included . . . . . . . . . . . . . . . . . . . . .
13
14
15
18
19
21
23
24
25
26
28
29
29
32
LIST OF TABLES
Table 1. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. Operating Conditions and Powering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Battery Feed, Switchhook Detectors (LCA and LCB), and Fault Detectors (FLTA and FLTB) . . . . . 8
Table 4. Ring-Trip Detectors (RTA, RTB, RZA, and RZB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Relay Drivers (RDRA, RDTA, RDRB, RDTB, RDDA, and RDDB) . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Analog Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Transmission Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 8. Logic Inputs (CLK, EN, and DI) and Outputs (DO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 9. Timing Requirements for CLK, EN, DI, and DO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. MMC A31A8575AA Thick Film Resistor Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 11. Total Module Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Truth Table for EN and CLK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. Otuput DATA Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 14. Output DATA Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 15. Input DATA Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 16. Truth Table for D1 and D0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 17. External Components Required . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Le8575 Dual-Resistive SLIC Device
3
P R E L I M I N A R Y
CONNECTION DIAGRAM
CFLTB
CFLTA
DGND
VDDD
VDDD
41
DGND
40
39
38
37
36
35
RDDA
RDRA
RDTA
RTPA
RTNA
XMTA
TSA
RSA
RGBNA
VRNA
IRPA
34
33
32
31
30
29
18
PTB
19
PRB
20
AGND
21
VBAT
22
CBNB
23
VDDA
24
CBNA
25
VBAT
26
AGND
27
PRA
28
PTA
CLK
44
DO
NC
EN
43
DI
3
6
RDDB
RDRB
RDTB
RTPB
RTNB
XMTB
TSB
RSB
RGBNB
VRNB
IRPB
7
8
9
10
11
12
13
14
15
16
17
5
4
2
1
42
44-Pin PLCC
PIN DESCRIPTIONS
Symbol
AGND
CBNA
Type
—
I
Name/Function
Analog Signal Ground.
Signal ground for channels A and B.
Battery Noise Capacitor (Channel A).
The current flowing out of PRA is –50 times the voltage applied to
CBNA, divided by the impedance connected between RGBNA and AGND. Couple V
BAT
to CBNA through
a high-pass filter to eliminate battery noise from the Tip/Ring of channel A.
Battery Noise Capacitor (Channel B).
The current flowing out of PRB is –50 times the voltage applied to
CBNB, divided by the impedance connected between RGBNB and AGND. Couple V
BAT
to CBNB through
a high-pass filter to eliminate battery noise from the Tip/Ring of channel B.
Fault Filter (Channel A).
Connect a 0.1
µF
capacitor from CFLTA to AGND. This capacitor filters Tip/Ring
transients from the channel A fault detector.
Fault Filter (Channel B).
Connect a 0.1
µF
capacitor from CFLTB to AGND. This capacitor filters Tip/Ring
transients from the channel B fault detector.
Clock.
When the enable input (EN) is high, a low-to-high transition on this logic input shifts data at the data
input pin (DI) into the 8-bit serial shift register. When the enable input (EN) is low, a low-to-high transition
latches the states of the internal detectors into the 8-bit serial shift register.
Digital Ground.
Ground for channel A and B relay drivers.
Serial Data Input.
Data on this logic input is shifted into the 8-bit serial shift register with the clock signal
on pin CLK.
Serial Data Output.
Data in the internal 8-bit serial shift register is shifted out on this logic output with the
clock signal on pin CLK.
Enable.
A high-to-low transition on this logic input latches the data in the 8-bit serial shift register into the
output latches. The logic level of EN also controls which data is shifted into the 8-bit serial shift register (refer
to CLK pin description). This pin has a 100 K internal pull-up resistor to VDDD.
Receive Current Positive Input (Channel A).
The differential current flowing from PTA to PRA is 200
times the current flowing into IRPA.
Receive Current Positive Input (Channel B).
The differential current flowing from PTB to PRB is 200
times the current flowing into IRPB.
No Connect.
Unused pin (no internal connection).
CBNB
CFLTA
CFLTB
CLK
DGND
DI
DO
EN
IRPA
IRPB
NC
I
I/O
I/O
I
—
I
O
I
I
I
—
4
Le8575 Dual-Resistive SLIC Device
P R E L I M I N A R Y
Symbol
PRA
PRB
PTA
PTB
RDDA
RDDB
RDRA
RDRB
RDTA
RDTB
RGBNA
Type
O
O
O
O
O
O
O
O
O
O
I
Name/Function
Protected Ring (Channel A).
Output of the Ring current drive amplifier A. Connect PRA to the Ring of loop
A through an overvoltage protection resistor (1.4 kΩ minimum).
Protected Ring (Channel B).
Output of the Ring current drive amplifier B. Connect PRB to the Ring of loop
B through an overvoltage protection resistor (1.4 kΩ minimum).
Protected Tip (Channel A).
Output of the Tip current drive amplifier A. Connect PTA to the Tip of loop A
through an overvoltage protection resistor (1.4 kΩ minimum).
Protected Tip (Channel B).
Output of the Tip current drive amplifier B. Connect PTB to the Tip of loop B
through an overvoltage protection resistor (1.4 kΩ minimum).
Disconnect Relay Driver (Channel A).
This output drives an external relay.
Disconnect Relay Driver (Channel B).
This output drives the external relay.
Ringing Relay Driver (Channel A).
This output drives the external ringing relay.
Ringing Relay Driver (Channel B).
This output drives an external ringing relay.
Test Relay Driver (Channel A).
This output drives an external test relay.
Test Relay Driver (Channel B).
This output drives an external test relay.
Battery Noise Gain Resistor (Channel A).
The current flowing out of PRA is 50 times the current flowing
into RGBNA. Connect a resistor from RGBNA to AGND to set the gain of the channel A battery noise
cancellation circuit.
Battery Noise Gain Resistor (Channel B).
The current flowing out of PRB is 50 times the current flowing
into RGBNB. Connect a resistor from RGBNB to AGND to set the gain of the channel B battery noise
cancellation circuit.
Ring Sense (Channel A).
Positive input of channel A transmit op amp. Connect one high-value resistor
between RSA and the Ring of loop A and another high-value resistor between RSA and AGND.
Ring Sense (Channel B).
Positive input of channel B transmit op amp. Connect one high-value resistor
between RSB and the Ring of loop B and another high-value resistor between RSB and AGND.
Ring-Trip Negative (Channel A).
Negative sense input for the ring-trip detector.
Ring-Trip Negative (Channel B).
Negative sense input for the ring-trip detector.
Ring-Trip Positive (Channel B).
Positive sense input for the ring-trip detector.
Tip Sense (Channel A).
Negative input of channel A transmit op amp. Connect one high-value resistor
between TSA and the Tip of loop A and another high-value resistor between TSA and XMTA.
Tip Sense (Channel B).
Negative input of channel B transmit op amp. Connect one high-value resistor
between TSB and the Tip of loop B and another high-value resistor between TSB and XMTB.
Office Battery Supply.
Negative office battery supply for channels A and B.
5 V Analog DC Supply.
5 V Digital DC Supply.
5 V supply for logic and relay driver flyback diodes.
Receive Voltage Negative Input (Channel A).
The differential current flowing from PTA to PRA is –200
times the voltage applied to VRNA, divided by the impedance connected between IRPA and AGND.
Receive Voltage Negative Input (Channel B).
The differential current flowing from PTB to PRB is –200
times the voltage applied to VRNB, divided by the impedance connected between IRPB and AGND.
Transmit Signal Output (Channel A).
Channel A transmit amplifier output.
Transmit Signal Output (Channel B).
Channel B transmit amplifier output.
RGBNB
RSA
RSB
RTNA
RTMB
RTPB
TSA
TSB
VBAT
VDDA
VDDD
VRNA
VRNB
XMTA
XMTB
I
I
I
I
I
I
I
I
—
—
—
I
I
O
O
Le8575 Dual-Resistive SLIC Device
5
51mcu
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