531HA310M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531HA310M000DGR

531HA310M000DGR: DescriptionCMOS/TTL Output Clock Oscillator, 310MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531HA310M000DGR Overview

CMOS/TTL Output Clock Oscillator, 310MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531HA310M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	50%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	310 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

SHD301 single water supply pump frequency conversion speed regulation constant pressure water supply circuit a

Shuangyan brand BCD-183 refrigerator circuit

High performance antenna amplifier circuitd

Thyristor water level control circuit

Household power protector circuit

Electronic double switch

[GD32E231 Work Submission] Quartz Accelerometer Acquisition: IntroductionThe quartz accelerometer is a high-precision acceleration sensor with a higher range and stability than MEM. It can be combined with various gyroscope systems to achieve high-precision att...; wolfg4 GD32 MCU

Learning simulation + reading notes on "Operational Amplifier Noise Optimization Handbook" (Part 1): [i=s]This post was last edited by dontium on 2015-1-23 11:33[/i] Noise is defined as any unwanted signal in an electronic system. Noise includes inherent noise and external noise. The spice simulation...; 一潭清水 Analogue and Mixed Signal

Can two devices communicate using the Jtag interface?: I am working on a project recently, combining two existing devices. The two devices' CPUs need to communicate, and all interfaces have other uses, leaving only one Jtag. Is there any way to use Jtag f...; hanxiao007 Embedded System

[Repost] Repost a good article to learn STM8: Section 1: Mood and Clock To be honest, I don't have many microcontrollers that I can use. I always think that any microcontroller can develop a good product. In the past few years, I used 51 and alwa...; tiankai001 stm32/stm8

430 serial port wakeup: When the 430 microcontroller enters LPM3 mode at a baud rate of 9600, it can only wake up after receiving 10 bytes. How can I make it wake up after receiving 1 byte?...; newnew0601 Microcontroller MCU

How to develop applications on a specific platform: I originally developed an application on Windows Mobile 6.0, and now I want to port it to a WinCE 6.0 PND (I bought it from someone else, and it seems that there is no SDK provided). I don't know how ...; yanxinghua Embedded System

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components